A silicon photonic WDM network for high-performance macrochip communications

We introduce a novel approach to interconnect multiple chips together with a silicon photonic WDM point-to-point network enabled by optical proximity communications to act as a single large piece of logical silicon much larger than a single reticle limit. We call this structure a macrochip. This non-blocking network provides all-to-all low-latency connectivity while maximizing bisection bandwidth, making it ideal for multi-core and multi-processor interconnections. We envision bisection bandwidth up to TBps for an 8x8 macrochip design. And a 5-6x improvement in latency can be achieved when compared to a purely electronic implementation. We also observe better overall performance over other optical network architectures.