Multimedia extensions for a reconfigurable processor

Today, multimedia applications are experiencing very rapid growth both in the technology market as well as in their hunger for computation power. Because of the need for rapid prototyping of emerging applications and standards, and the pressure to minimize the time to market, designers can no longer rely only on the traditional hard-wired multimedia co-processors. There is a clear need for a new design paradigm. It is important for such a paradigm to recognize emerging changes and expand or modify the multimedia extension accordingly. In this paper, we present a multimedia extension for Altera Nios/spl reg/, a popular FPGA-based reconfigurable processor.

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