VLSI Architectures for Digital Video Signal Processing

VLSI Architectures for real-time implementation of video signal processing algorithms have been studied. These algorithms exhibit very high processing demands in terms of computation rate and access rate which call for architectural structures adapted to the algorithms. Optimization of architectures has to consider the overall silicon area for the computation part, memories and interconnections. VLSI implentations according to the function oriented as well as the software oriented approach will be discussed. As examples for the function oriented approach architectures of dedicated circuits for filtering, DCT and block matching will be evaluated. Software oriented implementations by multiprocessor systems based on MIMD and SIMD architectures will be also presented.

[1]  Atsushi Nagata,et al.  Moving picture coding system for digital storage media using hybrid coding , 1990, Signal Process. Image Commun..

[2]  Peter A. Ruetz,et al.  A high-performance full-motion video compression chip set , 1992, IEEE Trans. Circuits Syst. Video Technol..

[3]  H. Yasuda.  Standardization activities on multimedia coding in ISO , 1989 .

[4]  B. Lee.  A new algorithm to compute the discrete cosine Transform , 1984 .

[5]  Mark J. T. Smith,et al.  Exact reconstruction techniques for tree-structured subband coders , 1986, IEEE Trans. Acoust. Speech Signal Process..

[6]  P. Pirsch,et al.  Advances in picture coding , 1985, Proceedings of the IEEE.

[7]  Kai Hwang,et al.  Computer arithmetic: Principles, architecture, and design , 1979 .

[8]  S. Kung,et al.  VLSI Array processors , 1985, IEEE ASSP Magazine.

[9]  Peter Pirsch,et al.  Multiprocessor performance for real-time processing of video coding applications , 1992, IEEE Trans. Circuits Syst. Video Technol..

[10]  Klaus Grüger,et al.  Design of HDTV subband filterbanks considering VLSI implementation constraints , 1991, IEEE Trans. Circuits Syst. Video Technol..

[11]  Ming-Ting Sun,et al.  An all-ASIC implementation of a low bit-rate video codec , 1992, IEEE Trans. Circuits Syst. Video Technol..

[12]  Ming-Ting Sun,et al.  A family of vlsi designs for the motion compensation block-matching algorithm , 1989 .

[13]  Francis Jutand,et al.  A one chip VLSI for real time two-dimensional discrete cosine transform , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[14]  Peter Pirsch,et al.  A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications , 1993, J. VLSI Signal Process..

[15]  Peter Pirsch,et al.  Array architectures for block matching algorithms , 1989 .

[16]  P. Pirsch,et al.  VLSI architectures of two-dimensional filters for HDTV coding , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[17]  Yukio Endo,et al.  Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP , 1989, J. VLSI Signal Process..

[18]  Ting Chen,et al.  VLSI implementation of a 16*16 discrete cosine transform , 1989 .

[19]  H. Gharavi,et al.  Sub-band coding of monochrome and color images , 1988 .