A general circuit for resistive bridge sensors with bitstream output

A low-offset integrated circuit useful for the readout of the signal coming from various types of integrated resistive bridge sensors has been developed in standard bipolar technology. The circuit, using a first order /spl Sigma/-/spl Delta/ A/D converter, provides a clock-synchronous pulse rate output which is highly suitable for the communication with a microprocessor and for a bus environment. An almost perfect offset cancellation is achieved by chopping the bridge voltage supply. The simplicity of the circuit makes it ideal for the integration with the sensors itself, while the digital interference rejection allows the integration of the digital control circuits for the bus on the same chip. The experimental results show that with a clock frequency of 200 kHz a resolution of 12 bits is obtained with a conversion time of 20 ms. The remaining offset is /spl plusmn/5 /spl mu/V. The bridge imbalance can be up to 18 mV/V. Depending on the chosen resolution the input signal bandwidth could be from about 25 Hz (12 bits) up to 400 Hz (8 bits).