Novel Voltage Choice and Min-Cut Based Assignment for Dual-VDD System
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[1] Gang Qu,et al. Leakage optimization using transistor-level dual threshold voltage cell library , 2009, 2009 10th International Symposium on Quality Electronic Design.
[2] Ankur Srivastava,et al. On gate level power optimization using dual-supply voltages , 2001, IEEE Trans. Very Large Scale Integr. Syst..
[3] Dennis Sylvester,et al. High performance level conversion for dual V/sub DD/ design , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[4] Evangeline F. Y. Young,et al. MSV-Driven Floorplanning , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[5] Joseph R. Shinnerl,et al. mPL6: enhanced multilevel mixed-size placement , 2006, ISPD '06.
[6] Dennis Sylvester,et al. A New Algorithm for Improved VDD Assignment in Low Power Dual VDD Systems , 2004 .
[7] M. C. Chi,et al. Gate Level Multiple Supply Voltage Assignment Algorithm for Power Optimization Under Timing Constraint , 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[8] Tao Lin,et al. Novel and efficient min cut based voltage assignment in gate level , 2011, 2011 12th International Symposium on Quality Electronic Design.
[9] Resve A. Saleh,et al. Application-driven floorplan-aware voltage island design , 2008, 2008 45th ACM/IEEE Design Automation Conference.
[10] Hung-Yi Liu,et al. Voltage Island Aware Floorplanning for Power and Timing Optimization , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[11] Li Shang,et al. TAPHS: thermal-aware unified physical-level and high-level synthesis , 2006, Asia and South Pacific Conference on Design Automation, 2006..
[12] Yao-Wen Chang,et al. An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning , 2007, ICCAD 2007.
[13] P. R. Stephan,et al. SIS : A System for Sequential Circuit Synthesis , 1992 .
[14] Qi Wang,et al. Static power optimization of deep submicron CMOS circuits for dual V/sub T/ technology , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).
[15] Hsin-Hsiung Huang,et al. Optimal voltage assignment approach for low power using ILP , 2008 .
[16] Dorit S. Hochbaum,et al. Solving the Convex Cost Integer Dual Network Flow Problem , 2003, Manag. Sci..
[17] Yici Cai,et al. Power driven placement with layout aware supply voltage assignment for voltage island generation in dual-Vdd designs , 2006, Asia and South Pacific Conference on Design Automation, 2006..
[18] Evangeline F. Y. Young,et al. Network flow-based power optimization under timing constraints in MSV-driven floorplanning , 2008, ICCAD 2008.