Power distribution strategies based on current estimation and simulation of lossy transmission lines in conjunction with power isolation circuits

Investigations have shown that the layout of power lines and isolation circuits as well as the modules' circuit switching has a large influence on the behavior of the whole system. A current estimation strategy for the calculation of the module current consumption in CMOS technology is investigated. The electrical behavior of losses in signal and power lines is taken into account. An efficient current estimation is introduced with a new program-SIMCURRENT. Another program carries out analog circuit simulations including the modelling of coupled lossy transmission lines. Fast and accurate estimates of the I/sub dd/-current are carried out by SIMCURRENT. Simulations-often not possible with classical circuit analysis programs-were made with the program LISM. Regarding monolithic systems, one must include power isolation circuits in the power rail system. A proper layout of the global supply network (not using the lowest resistive layout) is proposed.<<ETX>>

[1]  T. Hillmann-Ruge,et al.  Investigations of Nd:YAG laser formed connections and disconnections of standard CMOS double level metallizations , 1990, 1990 Proceedings. International Conference on Wafer Scale Integration.

[2]  Wojciech Maly,et al.  Current sensing for built-in testing of CMOS circuits , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[3]  Ibrahim N. Hajj,et al.  CREST-a current estimator for CMOS circuits , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[4]  Wojciech Maly,et al.  Built-in current testing-feasibility study , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[5]  H. Grabinski,et al.  Simulation and test of faults in WSI interconnect systems , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[6]  Ping Yang,et al.  Pattern-independent current estimation for reliability analysis of CMOS circuits , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

[7]  Hartmut Grabinski,et al.  LISIM-simulator for time domain simulation of lossy transmission line systems in a nonlinear circuit environment , 1989, Proceedings. VLSI and Computer Peripherals. COMPEURO 89.

[8]  Ping Yang,et al.  SPIDER -- A CAD System for Modeling VLSI Metallization Patterns , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Ulrich Theus Elektronenstrahlgesteuerter Vollscheiben-Selbsttest für hochintegrierte Digitalschaltungen , 1984 .

[10]  M. Santomauro,et al.  Time-Domain Simulation of n Coupled Transmission Lines , 1987 .

[11]  Hartmut Grabinski An algorithm for computing the signal propagation on lossy VLSI interconnect systems in the time domain , 1989, Integr..

[12]  Hans Volkers,et al.  Architecture Of A Programmable Real-Time Processor For Digital Video Signals Adapted To Motion Estimation Algorithms , 1988, Other Conferences.

[13]  T. Hillma INVESTIGATIONS OF Nd:YAG LASER FORMED CONNECTIONS AND DISCONNECTIONS OF STANDARD CMOS DOUBLE LEVEL METALLIZATIONS' , 1990 .