INTERCONNECT TESTING WITH BOUNDARY SCAN

Boundary scan is a structured design technique which can be used to simplify the testing of digital circuits, boards, and systems. With boundary scan, test patterns can be generated which provide 100% stuck-at and bridging fault coverage of board interconnections. The paper describes the advantages and disadvantages of boundary scan along with the application and implementation of boundary scan circuitry. Algorithms for generating interconnect test patterns for stuck-at and bridging fault coverage are also presented