Integrated micro-solar cell structures for harvesting supplied microsystems in 0.35-µm CMOS technology

In this paper we present a solar harvester test chip, realized to characterize several integrated solar cell structures, gathering the information required to design a complete power management system for handling the harvested energy. In particular, we realized photodiodes with three different geometries of the p-diffusion, and three different dimensions of the n-well. The chip is realized in a 0.35-µm CMOS technology, and the diodes feature different active area density, depending on the geometry of the p-diffusions. In order to evaluate the harvesting performance of the solar cells in real applications, we developed an equivalent circuit of the devices, based on the experimental data and we used it to design a power management system specific for discrete-time applications. The power management system is being integrated on the same chip of the micro solar cells, in a 0.35-µm CMOS technology.