Opacity proof for CaPR+ algorithm

In this paper, we describe an enhanced Automatic Checkpointing and Partial Rollback algorithm(CaPR+) to realize Software Transactional Memory(STM) that is based on continuous conflict detection, lazy versioning with automatic checkpointing, and partial rollback. Further, we provide a proof of correctness of CaPR+ algorithm, in particular, Opacity, a STM correctness criterion, that precisely captures the intuitive correctness guarantees required of transactional memories. The algorithm provides a natural way to realize a hybrid system of pure aborts and partial rollbacks. We have also implemented the algorithm, and shown its effectiveness with reference to the Red-black tree micro-benchmark and STAMP benchmarks. The results obtained demonstrate the effectiveness of the Partial Rollback mechanism over pure abort mechanisms, particularly in applications consisting of large transaction lengths.

[1]  Monika Gupta,et al.  Clustered Checkpointing and Partial Rollbacks for Reducing Conflict Costs in STMs , 2010 .

[2]  Per Stenström,et al.  Intermediate checkpointing with conflicting access prediction in transactional memory systems , 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

[3]  Michel Raynal,et al.  A Lock-Based STM Protocol That Satisfies Opacity and Progressiveness , 2008, OPODIS.

[4]  Petr Kuznetsov,et al.  On the Cost of Concurrency in Transactional Memory , 2011, OPODIS.

[5]  Gottfried Vossen,et al.  Transactional Information Systems: Theory, Algorithms, and the Practice of Concurrency Control and Recovery , 2002 .

[6]  Daniel Lupei.  A Study of Conflict Detection in Software Transactional Memory , 2010 .

[7]  Alessandro Pellegrini,et al.  Transparent Support for Partial Rollback in Software Transactional Memories , 2013, Euro-Par.

[8]  Hagit Attiya,et al.  A Single-Version STM that Is Multi-Versioned Permissive , 2012, Theory of Computing Systems.

[9]  Kunle Olukotun,et al.  STAMP: Stanford Transactional Applications for Multi-Processing , 2008, 2008 IEEE International Symposium on Workload Characterization.

[10]  Petr Kuznetsov,et al.  On Non-Interference of Transactions , 2012, arXiv.org.

[11]  Michel Raynal,et al.  Read Invisibility, Virtual World Consistency and Probabilistic Permissiveness are Compatible , 2011, ICA3PP.

[12]  Anoop Gupta,et al.  The SPLASH-2 programs: characterization and methodological considerations , 1995, ISCA.

[13]  Gerhard Weikum,et al.  CHAPTER FOUR – Concurrency Control Algorithms , 2002 .

[14]  Marc H. Scholl,et al.  Transactional information systems: theory, algorithms, and the practice of concurrency control and recovery , 2001, SGMD.

[15]  Nir Shavit,et al.  Software transactional memory , 1995, PODC '95.

[16]  Jan Vitek,et al.  STMBench7: a benchmark for software transactional memory , 2007, EuroSys '07.

[17]  Maurice Herlihy,et al.  Linearizability: a correctness condition for concurrent objects , 1990, TOPL.

[18]  Rachid Guerraoui,et al.  Principles of Transactional Memory , 2010, Synthesis Lectures on Distributed Computing Theory.

[19]  Maurice Herlihy,et al.  Checkpoints and continuations instead of nested transactions , 2008, SPAA '08.

[20]  Rachid Guerraoui,et al.  On the correctness of transactional memory , 2008, PPoPP.