Research on mechanical reliability of multilayer packaging substrate based on build-up film

With the increasing demand for high-performance computers, the market of IC substrates for CPUs, GPUs, FPGAs and ASICs, etc. is expanding. It has promoted the development of build-up films (BF) suitable for multi-layer substrates. High reliability is fundamental for electronic packaging materials. The application of BF materials to IC substrates often causes warpage, fracture, and stress failure. Therefore, exploring the relationship between material properties of BF and reliability is extremely important for its stable application. Finite element analysis (FEA) is feasible in evaluating the causes of failure. In this study, FEA is employed to investigate in detail the stress and strain of BF and copper circuits by constructing multi-layer substrate structure laminated with different circuits. During the cooling process, the more shrinkage of BF will induce stress to the circuit. In each layer, the edge part of the circuit towards the middle is more severely stressed. For different layers, the circuit at second layer is more stressed, as compared with the surface layer and the third layer, which might be due to relatively severe mismatch of the coefficient of thermal expansion (CTE) between circuit and BF at second layer. Furthermore, the density of circuits is found to be an important factor to determine the stress in circuit. With a denser circuit distribution, the overall stress first decreases and then increases. The reason is discussed. Finally, the relationships between material properties of BF and warpage of package are investigated based on equivalent material parameters, which may have certain guiding significance for reducing package warpage by developing suitable BF material.