Chapter 7 – PCI Bridging

Publisher Summary This chapter explores the concept of peripheral component interconnect (PCI) bridging as a way to build larger systems. It also describes an alternative interrupt mechanism using ordinary PCI transactions. A PCI system expands beyond the electrical limits of a single bus segment through bridging mechanism. These bridges serve to interface the host processor to PCI (host-to-PCI bridge) and to interface PCI to legacy busses (PCI-to-ISA bridge). Once configured, the primary job of a PCI-to-PCI bridge is to act as an address filter, accepting transactions directed at agents downstream of it and ignoring transactions that fall outside of its address windows. These bridges then allow to pre-fetch reading data and post write data provided they observe rules to prevent deadlocks and avoid reading stale data. Write posting can create a problem for interrupts because the interrupt may arrive at the host processor before the associated data buffer is written to memory. The Message Signaled Interrupt (MSI) capability solves this problem by treating interrupts as bus transactions rather than as separate signals, only under rare circumstances, a master is allowed to lock a target for exclusive access.