Resource pools: an abstraction for configurable computing codesign

The utility of configurable computing platforms has been demonstrated and documented for a wide variety of applications. Retargeting an application to custom computing machines (CCMs) has been shown to accelerate execution speeds with respect to execution on a sequential, general- purpose processor. Unfortunately, these platforms have proven to be rather difficult to program when compared to contemporary general-purpose platforms. Retargeting applications is non-trivial, due to the lack of design tools which work at a high level and consider all available computational units in the target architecture. To make configurable computing accessible to a wide user base, high- level entry tools -- preferably targeted toward familiar programming environments -- are needed. Also, in order to target a wide variety of custom computing machines, such tools cannot depend on a particular, fixed, architectural configuration. This paper introduces resource pools as an abstraction of general computing devices which provides a homogeneous description of FPGAs, ASICs, CPUs, or even an entire network of workstations. Also presented is an architecture-independent design tool which accepts a target architecture's description as a collection of resource pools, and partitions a program written in a high-level language onto that architecture, effectively synthesizing a hardware description for the FPGA portions of A CCM, and a software description for any attached CPUs.

[1]  Peter M. Athanas,et al.  Scheduling and partitioning ANSI-C programs onto multi-FPGA CCM architectures , 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[2]  Steven S. Muchnick,et al.  Advanced Compiler Design and Implementation , 1997 .

[3]  P.M. Athanas,et al.  Real-Time Image Processing on a Custom Computing Platform , 1995, Computer.

[4]  Richard W. Conners,et al.  A MOdular and Reprogrammable Real-time Processing Hardware, MORRPH , 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[5]  Richard W. Conners,et al.  MORRPH: a modular and reprogrammable real-time processing hardware , 1995, 1995 Proceedings of the IEEE International Symposium on Industrial Electronics.

[6]  Christopher W. Fraser,et al.  A Retargetable C Compiler: Design and Implementation , 1995 .

[7]  Harvey F. Silverman,et al.  Processor reconfiguration through instruction-set metamorphosis , 1993, Computer.