Minimization of multioutput TANT networks for unlimited fan-in network model

A program for the minimization of multi-output three-level Boolean networks from NAND gates of unlimited fan-in is described. This model includes don't care states. The algorithm is fast and creates good-quality approximate solutions, and its efficiency increases with the percentage of don't cares. It has been tried on about 40 Boolean functions of not more than 14 inputs, and yielded correct results. The realized circuits (on PLH501 and PLH502 PLDs) required up to 68% (on the average 35%) less gates than the corresponding PLAs. The program can consider tradeoffs between the solution-cost and the processing speed by using various type of the source data.<<ETX>>

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