NV-SP: A New High Performance and Low Energy NVM-Based Scratch Pad

Non-Volatile Memory technologies are rising as a candidate for a universal memory. NVMs offer solutions for the high power consumption that contemporary memory suffers from. Hence, we propose augmenting the traditional SRAM cache with an additional NVM device instead of entirely replacing SRAM with NVM. The L1 instruction-cache is augmented with a Non-Volatile Scratch-Pad, coined NV-SP, that stores instructions causing the highest number of misses. Experiments were evaluated for performance and energy of the SRAM I-cache and the NV-SP when implemented using Magnetic RAM and Phase-Changing RAM technologies. Results have shown that MRAM NV-SP had effectively improved the performance of the I-cache.

[1]  Somayeh Sardashti,et al.  The gem5 simulator , 2011, CARN.

[2]  José Luís Almada Güntzel,et al.  Mapping Data and Code into Scratchpads from Relocatable Binaries , 2009, 2009 IEEE Computer Society Annual Symposium on VLSI.

[3]  Abdoulaye Gamatié,et al.  Potential applications based on NVM emerging technologies , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[4]  H. Hamann,et al.  Ultra-high-density phase-change storage and memory , 2006, Nature materials.

[5]  S. Parkin,et al.  Magnetic Tunnel Junctions , 2007 .

[6]  Haralampos Pozidis,et al.  Recent Progress in Phase-Change Memory Technology , 2016, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[7]  Mohamad Towfik Krounbi,et al.  Erratum: Basic principles of STT-MRAM cell operation in memory arrays , 2013 .

[8]  Cong Xu,et al.  NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  B. Bala Tripura Sundari,et al.  Power Reduction by Clock Gating Technique , 2015 .