Power monitors: a framework for system-level power estimation using heterogeneous power models
暂无分享,去创建一个
Anand Raghunathan | Nikhil Bansal | Srimat T. Chakradhar | Kanishka Lahiri | N. Bansal | S. Chakradhar | A. Raghunathan | K. Lahiri
[1] Nikil D. Dutt,et al. IDAP: a tool for high-level power estimation of custom array structures , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[2] Massoud Pedram,et al. Low power design methodologies , 1996 .
[3] Christian Piguet,et al. Low-Power Electronics Design , 2004 .
[4] Sharad Malik,et al. Power analysis of embedded software: a first step towards software power minimization , 1994, IEEE Trans. Very Large Scale Integr. Syst..
[5] Anantha Chandrakasan,et al. JouleTrack: a web based tool for software energy profiling , 2001, DAC '01.
[6] Niraj K. Jha,et al. High-level software energy macro-modeling , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[7] Jörg Henkel,et al. Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs , 2001, IEEE Trans. Very Large Scale Integr. Syst..
[8] Anantha Chandrakasan,et al. A bus energy model for deep submicron technology , 2002, IEEE Trans. Very Large Scale Integr. Syst..
[9] Peter Marwedel,et al. An Accurate and Fine Grain Instruction-Level Energy Model Supporting Software Optimizations , 2007 .
[10] M. Balakrishnan,et al. Speeding up power estimation of embedded software , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).
[11] J. Rabaey,et al. Behavioral Level Power Estimation and Exploration , 1997 .
[12] Srivaths Ravi,et al. Power estimation for cycle-accurate functional descriptions of hardware , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..
[13] Luciano Lavagno,et al. Cosimulation-based power estimation for system-on-chip design , 2002, IEEE Trans. Very Large Scale Integr. Syst..
[14] Luca Benini,et al. Dynamic power management - design techniques and CAD tools , 1997 .
[15] Sujit Dey,et al. Efficient power profiling for battery-driven embedded system design , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[16] Margaret Martonosi,et al. Wattch: a framework for architectural-level power analysis and optimizations , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).
[17] Jörg Henkel,et al. A framework for estimation and minimizing energy dissipation of embedded HW/SW systems , 1998, DAC.
[18] Mahmut T. Kandemir,et al. The design and use of simplePower: a cycle-accurate energy estimation tool , 2000, Proceedings 37th Design Automation Conference.
[19] Massoud Pedram,et al. High-level Power Modeling, Estimation, And Optimization , 1997, Proceedings of the 34th Design Automation Conference.
[20] Srinivas Devadas,et al. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits , 1996 .
[21] Kanad Ghose,et al. Analytical energy dissipation models for low-power caches , 1997, ISLPED '97.
[22] Eike Schmidt,et al. Estimation of lower and upper bounds on the power consumption from scheduled data flow graphs , 2001, IEEE Trans. Very Large Scale Integr. Syst..
[23] Sujit Dey,et al. High-Level Power Analysis and Optimization , 1997 .