A Game Theoretical Approach for VLSI Physical Design Placement

[1]  Tung-Chieh Chen,et al.  Challenges and solutions in modern analog placement , 2007, Proceedings of Technical Program of 2012 VLSI Design, Automation and Test.

[2]  Rakesh Mohanty,et al.  SIMULATED ANNEALING BASED PLACEMENT ALGORITHMS AND RESEARCH CHALLENGES: A SURVEY , 2012 .

[3]  Hafizur Rahaman,et al.  Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations , 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

[4]  Yishay Mansour,et al.  Fast convergence of selfish rerouting , 2005, SODA '05.

[5]  Jin Hu,et al.  Progress and Challenges in VLSI Placement Research , 2012, Proceedings of the IEEE.

[6]  Sherief Reda,et al.  Effective linear programming based placement methods , 2006, ISPD '06.

[7]  Igor L. Markov,et al.  VLSI Physical Design - From Graph Partitioning to Timing Closure , 2011 .

[8]  Sabih H. Gerez,et al.  Algorithms for VLSI design automation , 1998 .

[9]  Sachin S. Sapatnekar,et al.  Handbook of Algorithms for Physical Design Automation , 2008 .

[10]  Ernest S. Kuh,et al.  Sequence-pair based placement method for hard/soft/pre-placed modules , 1998, ISPD '98.

[11]  Rob A. Rutenbar,et al.  Simulated annealing algorithms: an overview , 1989, IEEE Circuits and Devices Magazine.

[12]  Pinaki Mazumder,et al.  VLSI cell placement techniques , 1991, CSUR.

[13]  Chris Chu CHAPTER 11 – Placement , 2009 .

[14]  Yao-Wen Chang,et al.  B*-Trees: a new representation for non-slicing floorplans , 2000, DAC.

[15]  Tami Tamir,et al.  The Efficiency of Best-Response Dynamics , 2017, SAGT.

[16]  Igor L. Markov,et al.  Combinatorial techniques for mixed-size placement , 2005, TODE.

[17]  Zhen Yang,et al.  Global Placement Techniques for VLSI Physical Design Automation , 2002, CAINE.

[18]  Richard E. Korf,et al.  Optimal Rectangle Packing: An Absolute Placement Approach , 2014, J. Artif. Intell. Res..

[19]  R. Norman,et al.  Solid-state micrologic elements , 1960 .

[20]  N. Quinn,et al.  A forced directed component placement procedure for printed circuit boards , 1979 .