Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers

We report on our systems engineering activities concerning cryogenic CMOS electronics as building blocks for scalable quantum computers. Following the V-model of engineering, the topic is approached both in top-down and in bottom-up fashion. We show the main results from the top-down study using system modeling and simulations. In a bottom-up fashion, a prototype chip was designed and implemented in a commercial 65nm CMOS process. The chip contains a DC digital-to-analog-converter (DC-DAC) and a Pulse-DAC as building blocks for an integrated quantum bit control. The DC-DAC is able to tune a qubit into its operating point. The Pulse-DAC generates pulse patterns with 250MHz sampling frequency to perform gate operations on a qubit.