A high-quality and high-speed system of Bayer image restoration controlled by DM642 and FPGA

Here we present an efficient real-time system for Bayer image restoration. The system uses the dual processing pipeline architectures (DM642 and FPGA) to improve the speed and quality. FPGA collects and pre-processes a raw Bayer image from the CMOS image sensor. DM642 executes core algorithm processing and runs bilinear interpolation algorithm to form the RGB format image. The system could process a Bayer image of 752×480 pixels within 17.4 ms, and could transmit the final image to the host computer with 10Mb/s band-width through the Ethernet port.