Design and Analysis of a Highly Efficient Linearized CMOS Subharmonic Mixer for Zero and Low-IF Applications

This paper presents the distortion analysis of a linearized CMOS subharmonic mixer (SHM) based on a Volterra series analysis. The secondand third-order intermodulation distortions are reduced by a modified second-harmonic reinjection in the RF transconductance stage. An injected IM2 is mixed with an RF input signal and generates an IM3 signal with the same amplitude and opposite phase of a main path for the cancellation of the intrinsic IM3 signal. In order to cancel the second-order intermodulation component, a signal with the same IM2 amplitude and opposite phase of the main path is generated. Closed-form expressions of the conversion gain along with the second- and third-order distortions are derived using a Volterra series analysis to facilitate an optimal design and provide an insight into the nonlinearity of SHM. An inductive connection between RF and local oscillator stages implementing a π-network is employed to improve the linearity and enhance the gain and bandwidth of the mixer. Simulation results performed in Taiwan Semiconductor Manufacturing Company 0.18-μm CMOS process at 2.4-GHz RF frequency and 1.6 V supply voltage. The results show that the proposed mixer without the π-network, in comparison with the conventional mixer, exhibits up to 15 and 14 dB improvements in IIP2 and IIP3, respectively. The improvements obtained over 1-20 MHz two-tone spacing range without gain reduction or noise penalty. Moreover, in the presence of the π-network, the mixer exhibits up to 25 and 7 dB improvements in IIP2 and IIP3, respectively; the gain, bandwidth, and noise figure are also improved. The simulation results demonstrate good accuracy in comparison with the analytical results.