Enabling Chip-to-Substrate All-Cu Interconnections: Design of Engineered Bonding Interfaces for Improved Manufacturability and Low-Temperature Bonding

This paper presents the design and implementation of engineered nanoscale bonding interfaces as an effective strategy to improve manufacturability of Cu-Cu bonding to the level where it can, for the first time, be applied to chip-to-substrate (C2S) assembly. All-Cu interconnections are highly sought after to meet the escalating electrical, thermal, and reliability requirements of a wide range of emerging digital and analog systems. Such applications require low-cost processes with bonding temperatures and pressures ideally below 200°C and 20MPa, respectively, far from existing solutions established in wafer-level packaging. GT-PRC and its industry partners address this technology gap through innovative designs of bonding interfaces, introducing: 1) novel ultra-thin surface finish metallurgies applied on Cu bumps and pads to prevent oxidation and achieve low-temperature assembly, 2) low-cost fly-cut planarization technique to lower bonding pressures, and 3) low-modulus nanocopper foam caps to provide tolerance to non-coplanarities, and further reduce bonding temperatures and pressures.

[1]  Rao Tummala,et al.  Low temperature, low profile, ultra-fine pitch copper-to-copper chip-last embedded-active interconnection technology , 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

[2]  J. B. Bindell,et al.  The failure of aged CuAu thin films by Kirkendall porosity , 1979 .

[3]  J. Wei,et al.  Low temperature Cu-Cu thermo-compression bonding with temporary passivation of self-assembled monolayer and its bond strength enhancement , 2012, Microelectron. Reliab..

[4]  W. S. Rasband,et al.  ImageJ: Image processing and analysis in Java , 2012 .

[5]  J. M. Morabito,et al.  Interdiffusion in the CuAu thin film system at 25°C to 250°C , 1977 .

[6]  Young-Bae Park,et al.  Annealing temperature effect on the Cu-Cu bonding energy for 3D-IC integration , 2011 .

[7]  Kazuaki Ano,et al.  Kirkendall void formation in eutectic SnPb solder joints on bare Cu and its effect on joint reliability , 2005 .

[8]  U. Welzel,et al.  Mechanisms of interdiffusion in Pd-Cu thin film diffusion couples , 2010 .

[9]  Y. C. Chan,et al.  Development of gold to gold interconnection flip chip bonding for chip on suspension assemblies , 2002, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

[10]  Sheng Liu,et al.  Low temperature thermocompression bonding based on copper nanostructure for 3D packaging , 2011, 2011 12th International Conference on Electronic Packaging Technology and High Density Packaging.

[11]  J. Borders.  Ion back-scattering analysis of interdiffusion in Cu-Au thin films , 1973 .

[12]  Chun-Kai Liu,et al.  Au–Sn bonding material for the assembly of power integrated circuit module , 2016 .

[13]  Yao-Jen Chang,et al.  Wafer-level Cu-Cu bonding technology , 2012, Microelectron. Reliab..

[14]  Venky Sundaram,et al.  Highly-reliable, 30µm pitch copper interconnects using nano-ACF/NCF , 2009, 2009 59th Electronic Components and Technology Conference.

[15]  Tadatomo Suga,et al.  Room temperature Cu–Cu direct bonding using surface activated bonding method , 2003 .

[16]  R. Spolenak,et al.  Alloy-dependent deformation behavior of highly ductile nanocrystalline AuCu thin films , 2014 .

[17]  High current-carrying and highly-reliable 30μm diameter Cu-Cu area-array interconnections without solder , 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

[18]  Paresh Limaye,et al.  Cu/Sn microbumps interconnect for 3D TSV chip stacking , 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

[19]  Curtis Zwenger,et al.  Next generation fine pitch Cu Pillar technology — Enabling next generation silicon nodes , 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

[20]  S. J. Rothman,et al.  Self‐diffusion in copper at low temperatures , 1974 .

[21]  Hong Wang,et al.  A Preparation Method of Patterned Nanoporous Copper , 2013 .

[22]  W D Brown,et al.  Transient Liquid Phase Die Attach for High-Temperature Silicon Carbide Power Devices , 2010, IEEE Transactions on Components and Packaging Technologies.

[23]  Ling Xie,et al.  6um Pitch High Density Cu-Cu Bonding for 3D IC Stacking , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[24]  Peter Borgesen,et al.  Nanocopper Based Solder-Free Electronic Assembly , 2014, Journal of Electronic Materials.

[25]  Zhong Chen,et al.  Temperature and pressure dependence in thermocompression gold stud bonding , 2006 .

[26]  P. Madakson,et al.  Interdiffusion and resistivity of Cu/Au, Cu/Co, Co/Au, and Cu/Co/Au thin films at 25–550 °C , 1990 .

[27]  A. Huffman,et al.  High density Cu-Cu interconnect bonding for 3-D integration , 2009, 2009 59th Electronic Components and Technology Conference.

[28]  R. Labie,et al.  Cu-Cu Bonding Alternative to Solder based Micro-Bumping , 2007, 2007 9th Electronics Packaging Technology Conference.

[29]  K. S. Siow,et al.  Are Sintered Silver Joints Ready for Use as Interconnect Material in Microelectronic Packaging? , 2014, Journal of Electronic Materials.

[30]  Zhong Chen,et al.  Critical temperatures in thermocompression gold stud bonding , 2007 .

[31]  Eric Beyne,et al.  3D stacking using Cu-Cu direct bonding , 2012, 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International.

[32]  C.C. Wong,et al.  Low Temperature Copper-Copper Thermocompression Bonding , 2008, 2008 10th Electronics Packaging Technology Conference.

[33]  V. Dragoi,et al.  Low-Temperature Cu-Cu Wafer Bonding , 2013 .

[34]  J. Bennett,et al.  On the formation of the ordered phases CuAu and Cu3Au at a copper/gold planar interface , 1979 .

[35]  Thomas Brunschwiler,et al.  Nanoparticle assembly and sintering towards all-copper flip chip interconnects , 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

[36]  J. Erlebacher,et al.  The Dealloying Critical Potential , 2002 .

[37]  U. Welzel,et al.  Interdiffusion, phase formation, and stress development in Cu-Pd thin-film diffusion couples: interface thermodynamics and mechanisms , 2008 .

[38]  V. Sukumaran,et al.  Low-Cost Thin Glass Interposers as a Superior Alternative to Silicon and Organic Interposers for Packaging of 3-D ICs , 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[39]  Qing Yang,et al.  Effect of preparation conditions on morphology and thermal stability of nanoporous copper , 2012 .

[40]  A. Karma,et al.  Evolution of nanoporosity in dealloying , 2001, Nature.

[41]  R. Tummala,et al.  Novel High-Temperature, High-Power Handling All-Cu Interconnections through Low-Temperature Sintering of Nanocopper Foams , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[42]  C. Yang,et al.  In Situ Electrochemical Fabrication of Three Dimensional Hierarchical Nanoporous Copper Films and Their Electrocatalytic Performance , 2016 .