Research on congestion perception and control of network on chip
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Yong Yang | Kai Cui | Xinchao Gu | Hua Cai | Ningbo Huang
[1] Dan Zhao,et al. Overlaid Mesh Topology Design and Deadlock Free Routing in Wireless Network-on-Chip , 2012, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip.
[2] Radu Marculescu,et al. On-chip stochastic communication [SoC applications] , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[3] Valentin Puente,et al. Immunet: Dependable Routing for Interconnection Networks with Arbitrary Topology , 2008, IEEE Transactions on Computers.
[4] Yubai Li,et al. Design and simulation of a torus structure and route algorithm for network on chip , 2007, 2007 7th International Conference on ASIC.
[5] Paul Ampadu,et al. Dual-Layer Adaptive Error Control for Network-on-Chip Links , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[6] Antonio Robles,et al. A Survey and Evaluation of Topology-Agnostic Deterministic Routing Algorithms , 2012, IEEE Transactions on Parallel and Distributed Systems.
[7] Martin Radetzki. Fault-Tolerant Differential Q Routing in Arbitrary NoC Topologies , 2011, 2011 IFIP 9th International Conference on Embedded and Ubiquitous Computing.