Performance Penalty for Fault Tolerance in Roving STARs
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Charles E. Stroud | Miron Abramovici | John M. Emmert | Andrew M. Taylor | Jason A. Cheatham | Pankaj Kataria
[1] Fadi J. Kurdahi,et al. Accurate prediction of quality metrics for logic level designs targeted toward lookup-table-based FPGAs , 1999, IEEE Trans. Very Large Scale Integr. Syst..
[2] Russell Tessier,et al. Tolerating operational faults in cluster-based FPGAs , 2000, FPGA '00.
[3] Shantanu Dutt,et al. Methodologies for Tolerating Cell and Interconnect Faults in FPGAs , 1998, IEEE Trans. Computers.
[4] Charles E. Stroud,et al. Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).
[5] Shantanu Dutt,et al. Efficient incremental rerouting for fault reconfiguration in field programmable gate arrays , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).
[6] John M. Emmert,et al. Incremental routing in FPGAs , 1998, Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372).
[7] Dinesh Bhatia,et al. Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement , 1997, FPL.
[8] Yasuo Kawahara,et al. Introducing redundancy in field programmable gate arrays , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.
[9] Gianluca Tempesti,et al. A robust multiplexer-based FPGA inspired by biological systems , 1997, J. Syst. Archit..
[10] Kaushik Roy,et al. On Routability for FPGAs under Faulty Conditions , 1995, IEEE Trans. Computers.
[11] Miodrag Potkonjak,et al. Efficiently supporting fault-tolerance in FPGAs , 1998, FPGA '98.
[12] Charles E. Stroud,et al. Dynamic fault tolerance in FPGAs via partial reconfiguration , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).