Multi stack package having dummy package substrate for protection of semiconductor chip and method of fabricating the same

The multi-stack package and a method of manufacturing a semiconductor chip having a protective package, the dummy substrate is disclosed. Multi-stack package according to the present invention comprises a pile of a package substrate on the semiconductor chip of the uppermost unit of the chip package in order to protect the plurality of units of the chip package and the unit chip packaged semiconductor chips of the uppermost unit of the chip package of which are vertically stacked.