A Fully Parallel Algorithm for Residue to Binary Conversion

Abstract A new method for converting numbers from a residue system to a binary notation is proposed which is based upon an original formulation of the Chinese Remainder Theorem. To prove its effectiveness in VLSI implementations a converter is presented and evaluated following a general VLSI model of computation. The proposed structure compares favourably with preceding results presented in the literature; in particular, the time which is required to perform conversion is O(log s ), with s representing the total number of input bits.

[1]  G. Alia,et al.  A VLSI algorithm for direct and reverse conversion from weighted binary number system to residue number system , 1984 .

[2]  Ferruccio Barsi Mod m Arithmetic in Binary Systems , 1991, Inf. Process. Lett..

[3]  Thu V. Vu Efficient Implementations of the Chinese Remainder Theorem for Sign Detection and Residue Decoding , 1985, IEEE Trans. Computers.

[4]  C. H. Huang A Fully Parallel Mixed-Radix Conversion Algorithm for Residue Number Applications , 1983, IEEE Transactions on Computers.

[5]  Giuseppe Alia,et al.  A VLSI Modulo m Multiplier , 1991, IEEE Trans. Computers.

[6]  R. Capocelli,et al.  Efficient VLSI networks for converting an integer from binary system to residue number system and vice versa , 1988 .

[7]  K. Elleithy,et al.  Fast and flexible architectures for RNS arithmetic decoding , 1992 .

[8]  Kai Hwang,et al.  Computer arithmetic: Principles, architecture, and design , 1979 .

[9]  Maria Cristina Pinotti,et al.  Time Optimal Mixed Radix Conversion for Residue Number Applications , 1994, Comput. J..

[10]  Richard I. Tanaka,et al.  Residue arithmetic and its applications to computer technology , 1967 .

[11]  C. Thomborson,et al.  A Complexity Theory for VLSI , 1980 .

[12]  H. T. Kung,et al.  A Regular Layout for Parallel Adders , 1982, IEEE Transactions on Computers.

[13]  R. Kumaresan,et al.  Residue to binary conversion for RNS arithmetic using only modular look-up tables , 1988 .

[14]  Christopher S. Wallace,et al.  A Suggestion for a Fast Multiplier , 1964, IEEE Trans. Electron. Comput..

[15]  A. L. Narasimha Reddy,et al.  An Implementation of Mixed-Radix Conversion for Residue Number Applications , 1986, IEEE Transactions on Computers.

[16]  Kurt Mehlhorn,et al.  Area-Time Optimal VLSI Integer Multiplier with Minimum Computation Time , 1983, Inf. Control..