论文信息 - A SiGe single-chip 3.3 V receiver IC for 10 Gb/s optical communication systems

A SiGe single-chip 3.3 V receiver IC for 10 Gb/s optical communication systems

A SiGe single-chip 3.3 V receiver IC for 10 Gb/s optical communication systems integrates a transimpedance preamplifier, a limiting amplifier with a reference voltage generator, and a clock and data recovery (CDR) circuit with a phase-locked loop (PLL). For this IC, phase-comparison automatically adjusts the clock phase to the optimum point for data regeneration in the CDR circuit. The receiver IC uses a SiGe bipolar transistor with 60 GHz cutoff frequency. It operates at 10 Gb/s with 660 mW power consumption at 3.3 V.

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