Hardware Architecture Design of CABAC Codec for H.264/AVC
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[1] Ajay Luthra,et al. Overview of the H.264/AVC video coding standard , 2003, IEEE Trans. Circuits Syst. Video Technol..
[2] Wei Yu,et al. A high performance CABAC decoding architecture , 2005, IEEE Transactions on Consumer Electronics.
[3] D. Marpe,et al. Video coding with H.264/AVC: tools, performance, and complexity , 2004, IEEE Circuits and Systems Magazine.
[4] V. K. Prasanna,et al. Area efficient VLSI architectures for Huffman coding , 1993 .
[5] Gary J. Sullivan,et al. Rate-constrained coder control and comparison of video coding standards , 2003, IEEE Trans. Circuits Syst. Video Technol..
[6] Thomas Wiegand,et al. Draft ITU-T recommendation and final draft international standard of joint video specification , 2003 .
[7] Chen Lei,et al. Context-Based Adaptive Binary Arithmetic Coding in the H.264/AVC , 2004 .
[8] Javier D. Bruguera,et al. A new architecture for fast arithmetic coding in H.264 advanced video coder , 2005, 8th Euromicro Conference on Digital System Design (DSD'05).
[9] Yang Song,et al. A CABAC Encoding Core with Dynamic Pipeline for H.264/AVC Main Profile , 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.
[10] Heiko Schwarz,et al. Context-based adaptive binary arithmetic coding in the H.264/AVC video compression standard , 2003, IEEE Trans. Circuits Syst. Video Technol..
[11] H. Shojania,et al. A high performance CABAC encoder , 2005, The 3rd International IEEE-NEWCAS Conference, 2005..