Characteristics of P‐channel SOI LDMOS Transistor with Tapered Field Oxides

A new tapered TEOS oxide technique has been developed to use field oxide of the power integrated circuits. It provides better uniformity of less than 3 % and reproducibility. On‐resistance of P‐channel RESURF (REduced SURface Field) LDMOS transistors has been optimized and improved by using a novel simulation and tapered TEOS field oxide on the drift region of the devices. With the similar breakdown voltage, at Vgs = −5.0 V, the specific on‐resistance of the LDMOS with the tapered field oxide is about 31.5 mΩ · cm2, while that of the LDMOS with the conventional field oxide is about 57 mΩ · cm2.

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