A survey of digital phase-locked loops

The purpose of this paper is to present a systematic survey of the theoretical/experimental work accomplished in the area of digital phase-locked loops (DPLL's) during the period of 1960 to 1980. The DPLL represents the heart of the Building blocks required in the implementation of coherent (all digital) communications and tracking receivers. This survey is particularly motivated by the fact that microprocessor technology is advancing rapidly to the extent that sophisticated and flexible signal processing algorithms for communications and control can be realized in the digital domain. In fact, it is anticipated that the use of this signal processing technology will continue to expand rapidly in the development of advanced communications and tracking receivers, e.g., all digital modems. Consequently, one major purpose of this paper is to provide the reader with a survey and an overview of the theoretical and experimental work accomplished to date, thereby offering speedy access to the techniques and hardware developments which have been presented in a scattered literature. In addition, the authors feel that a tutorial article revealing the various theories, their relationships to one another, their shortcomings, their advantages and the assumptions on which each is based, would be of tremendous value to the engineer trying to decide what particular analysis procedure is applicable to his peculiar problem. Consequently, a byproduct of this presentation will be to point out unsolved problems of practical interest. A broad class of digital modulation techniques, viz. I-Q modulations and demodulation, are studied in a rather general way.

[1]  N. S. Barnett,et al.  Private communication , 1969 .

[2]  H. Meyr.  Nonlinear Analysis of Correlative Tracking Systems Using Renewal Process Theory , 1975, IEEE Trans. Commun..

[3]  Someshwar C. Gupta,et al.  A Class of All Digital Phase Locked Loops: Modeling and Analysis , 1973, IEEE Transactions on Industrial Electronics and Control Instrumentation.

[4]  N. D'Andrea,et al.  A Binary Quantized Digital Phase Locked Loop: A Graphical Analysis , 1978, IEEE Trans. Commun..

[5]  H. Miyakawa,et al.  Statistical Analyses of Digital Phase-Locked Loops with Time Delay , 1977, IEEE Trans. Commun..

[6]  S. Gupta,et al.  First-Order Discrete Phase-Locked Loop with Applications to Demodulation of Angle-Modulated Carrier , 1972, IEEE Trans. Commun..

[7]  S.C. Gupta,et al.  Phase-locked loops , 1975, Proceedings of the IEEE.

[8]  Donald L. Snyder,et al.  The state-variable approach to analog communication theory , 1968, IEEE Trans. Inf. Theory.

[9]  C. Cahn,et al.  Digital Phase Sampling for Microcomputer Implementation of Carrier Acquisition and Coherent Tracking , 1980, IEEE Trans. Commun..

[10]  T. Majumdar.  Range extension of a digital phase locked loop , 1979, Proceedings of the IEEE.

[11]  S. C. Gupta,et al.  On Optimum Digital Phase-Locked Loops , 1968 .

[12]  A. Jazwinski.  Filtering for nonlinear dynamical systems , 1966 .

[13]  C. J. Byrne.  Properties and design of the phase-controlled oscillator with a sawtooth comparator , 1962 .

[14]  Francis D. Natali,et al.  ALL-DIGITAL COHERENT DEMODULATOR TECHNIQUES , 1972 .

[15]  A. McBride,et al.  On Optimum Sampled-Data FM Demodulation , 1973, IEEE Trans. Commun..

[16]  J. R. Cessna,et al.  DIGITAL PHASE LOCKED LOOPS WITH SEQUENTIAL LOOP FILTERS: A CASE FOR COARSE QUANTIZATION , 1972 .

[17]  C. Chie.  A Second-Order Frequency-Aided Digital Phase-Locked Loop for Doppler Rate Tracking , 1980, IEEE Trans. Commun..

[18]  Gurnam S. Gill,et al.  On Higher Order Discrete Phase-Locked Loops , 1972, IEEE Transactions on Aerospace and Electronic Systems.

[19]  S. C. Gupta,et al.  DEMODULATION OF FM SIGNALS BY A DISCRETE PHASE LOCKED LOOP , 1972 .

[20]  A. Weinberg,et al.  Discrete Time Analyses of Nonuniform Sampling First- and Second-Order Digital Phase Lock Loops , 1974, IEEE Trans. Commun..

[21]  S. Gupta,et al.  An Approach to the Analysis of Performance of Quasi-Optimum Digital Phase-Locked Loops , 1973, IEEE Trans. Commun..

[22]  E. Blum.  Numerical analysis and computation theory and practice , 1972 .

[23]  Aaron Weinberg,et al.  Digital Phase Lock for Optimum Demodulation , 1975, IEEE Transactions on Aerospace and Electronic Systems.

[24]  J. Garodnick,et al.  An all digital phase locked loop for FM demodulation. , 1972 .

[25]  S. C. Gupta,et al.  Discrete-time demodulation of angle-modulated analog signals transmitted over fading channels , 1975, Inf. Sci..

[26]  J. Garodnick,et al.  Response of an All Digital Phase-Locked Loop , 1974, IEEE Trans. Commun..

[27]  C. P. Reddy,et al.  An all digital phase locked loop for synchronization of a sinusoidal signal embedded in white Gaussian noise , 1973 .

[28]  S. Mori,et al.  Performance of Binary Quantized All Digital Phase-Locked Loop with a New Class of Sequential Filter , 1978, IEEE Trans. Commun..

[29]  D. L. Schilling,et al.  AN ALL DIGITAL PHASE LOCKED LOOP , 1972 .

[30]  P. Westlake.  Digital Phase Control Techniques , 1960 .

[31]  J. Holmes,et al.  Performance of a First-Order Transition Sampling Digital Phase-Locked Loop Using Random-Walk Models , 1972, IEEE Trans. Commun..

[32]  B. Cernuschi-Frias,et al.  An extension of the Gill and Gupta discrete phase-locked loop , 1980, Proceedings of the IEEE.

[33]  Chak Chie,et al.  Mathematical Analogies Between First-Order Digital and Analog Phase-Locked Loops , 1978, IEEE Trans. Commun..

[34]  D. Levy,et al.  Phase Noise and Transient Times for a Binary Quantized Digital Phase-Locked Loop in White Gaussian Noise , 1972, IEEE Trans. Commun..

[35]  B.G. Bosch,et al.  Gigabit electronics—A review , 1979, Proceedings of the IEEE.

[36]  J. Ortega.  Numerical Analysis: A Second Course , 1974 .

[37]  C. R. Tegnelia.  A simple second-order digital phase-locked loop. , 1972 .

[38]  S. Gupta,et al.  Quantizing and Sampling Considerations in Digital Phased-Locked Loops , 1974, IEEE Trans. Commun..

[39]  N. D'Andrea,et al.  Multilevel Quantized DPLL Behavior with Phase- and Frequency-Step Plus Noise Input , 1980, IEEE Trans. Commun..

[40]  G. Pasternack,et al.  Analysis and synthesis of a digital phase-locked loop for FM demodulation , 1968 .

[41]  S. Gupta,et al.  Quasi-Optimum Digital Phase-Locked Loops , 1973, IEEE Trans. Commun..

[42]  H. Osborne,et al.  Stability Analysis of an Nth Power Digital Phase-Locked Loop - Part I: First-Order DPLL , 1980, IEEE Transactions on Communications.

[43]  Someshwara C. Gupta,et al.  Discrete-time demodulation of continuous-time signals , 1972, IEEE Trans. Inf. Theory.

[44]  S. Gupta,et al.  On the Performance of Digital Phase Locked Loops in the Threshold Region , 1974, IEEE Trans. Commun..

[45]  T. Namekawa,et al.  Jitter reduction of a digital phase-locked loop , 1976, Proceedings of the IEEE.

[46]  S. Gupta,et al.  The Digital Phase-Locked Loop as a Near-Optimum FM Demodulator , 1972, IEEE Trans. Commun..

[47]  William C. Lindsey,et al.  Acquisition Behavior of a First-Order Digital Phase-Locked Loop , 1978, IEEE Trans. Commun..

[48]  L.F. Rocha,et al.  Simulation of a discrete PLL with variable parameters , 1979, Proceedings of the IEEE.

[49]  H. Osborne,et al.  Stability Analysis of an Nth Power Digital Phase-Locked Loop - Part II: Second- and Third-Order DPLL's , 1980, IEEE Transactions on Communications.

[50]  P. Henrici.  Elements of numerical analysis , 1966 .

[51]  J. Holmes,et al.  A Second-Order All-Digital Phase-Locked Loop , 1974, IEEE Trans. Commun..

[52]  F. Russo,et al.  Graphical Analysis of a Digital Phase-Locked Loop , 1979, IEEE Transactions on Aerospace and Electronic Systems.