Flow Control inaMulti-Plane Multi-Stage BufferedPacketSwitch

A large-capacity, multi-plane, multi-stage buffered packet switch, called theTrueWayswitch(1), waspreviously proposed byus.Itcanachieve hundreds ofterabits/sec capacity. A small-scale TrueWayswitch wasprototyped todemonstrate the concept andfeasibility. Threedifferent loadbalancing schemes wereinvestigated toachieve highthroughput andlowaverage delaywithamoderate speedup. Inthispaper, we focus onthe studyofoneoftheloadbalancing schemes, window-based re-sequencing scheme, without aspeedup. Itisthemostpromising oneamongthethreeintermsofperformance. Buffered switch modulesareusedindifferent stages toeliminate theneedof centralized scheduling. However, packetout-of-subsequence is inventible aspackets aredistributed todifferent pathsthathave various queuing delays. By applying flowcontrol between the input andoutput ports andlimiting there-sequencing windowsize (similar toTCP/IPflowcontrol), we areabletokeepthe implementation costtoanacceptable level whilestill providing highthroughput. Link-level flowcontrol between theswitch stages isrequired toprevent thedownstream queuesfrombeing overflowed. Theinteraction between linkflowcontrol atswitch stages andend-to-end flowcontrol atswitch ports isaninteresting problem. We showbysimulations thattheTrueWayswitch canbe engineered toachieve highthroughput without an internal speedup evenunderbursty non-uniform traffic distributions. IndexTerms - packet switch, multi-plane switch, Closnetwork