论文信息 - Why VLSI implementations of associative VLCNs require connection multiplexing

Why VLSI implementations of associative VLCNs require connection multiplexing

A discussion is presented of some of the implementation constraints imposed on VLSI architectures for emulations of very large connectionist/neural networks (VLCNs). Specifically, the authors show that multiplexing of interconnections is necessary for networks exhibiting poor locality. They show that it is more feasible to build a VLCN system with sharing or multiplexing of interconnections than to build one with dedicated wires for each connection. This is true unless the network exhibits extreme locality and all CNs are connected to others within some small-radius region. Unfortunately, association requires some global connectivity.<<ETX>>

J. Bailey | D. Hammerstrom | D. Hammerstrom | Jim Bailey

[1] Lawrence D. Jackel,et al. Artificial neural networks for computing , 1986 .

[2] Robert Hecht-Nielsen,et al. Performance Limits Of Optical, Electro-Optical, And Electronic Neurocomputers , 1986, Other Conferences.

[3] William J. Dally,et al. A VLSI Architecture for Concurrent Data Structures , 1987 .

[4] H. Graf,et al. A CMOS associative memory chip based on neural networks , 1987, 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[5] John Mates,et al. Microarchitecture specification for the Analog Processor Node, APN , 1987 .

[6] Jim Bailey,et al. A VLSI interconnect structure for neural networks , 1988 .

[7] Terrence J. Sejnowski,et al. NETtalk: a parallel network that learns to read aloud , 1988 .

[8] Misha Mahowald,et al. A silicon model of early visual processing , 1993, Neural Networks.

[9] G. Lynch,et al. Cortical encoding of memory: Hypotheses derived from analysis and simulation of physiological learning rules in anatomical structures. , 1989 .

[10] J. I. Raffel,et al. A generic architecture for wafer-scale neuromorphic systems , 1990 .