Bandwidth Expansion Methods of inductance Simulator Circuits and voltage-Mode biquads

In this paper, novel low and high frequency performance improvement techniques are proposed. High frequency performance improvement method is based on the single pole effect reduction/completely elimination by creating a corresponding zero while a low one is based on reduction/elimination of Z terminal parasitic resistors. Therefore, two grounded capacitance multipliers, three grounded inductor simulators, a floating inductor and a voltage-mode (VM) universal filter using second-generation current conveyors (CCIIs) are used to explain the developed methods. One of the grounded inductor simulators, floating simulated inductor and VM biquad are novel. Further, both of the new simulated inductors use a grounded capacitor; accordingly, they are suitable for IC fabrication. However, all the proposed circuits need a single matching condition. A number of simulations through PSPICE program and experimental tests are accomplished to demonstrate the workability, performance and effectiveness.

[1]  E. Yuce Voltage-Mode Multifunction Filters Employing a Single DVCC and Grounded Capacitors , 2009, IEEE Transactions on Instrumentation and Measurement.

[2]  Giuseppe Ferri,et al.  Vibration Damping Using CCII-Based Inductance Simulators , 2008, IEEE Transactions on Instrumentation and Measurement.

[3]  Kobchai Dejhan,et al.  Accurate CMOS-based current conveyors , 1991 .

[4]  Herve Barthelemy,et al.  Composite second-generation current conveyor with reduced parasitic resistance , 1994 .

[5]  E. Yuce Negative Impedance Converter With Reduced Nonideal Gain and Parasitic Impedance Effects , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

[6]  Shahram Minaei,et al.  Novel floating simulated inductors with wider operating-frequency ranges , 2009, Microelectron. J..

[7]  Shahram Minaei,et al.  On the Realization of Simulated Inductors with Reduced Parasitic Impedance Effects , 2009, Circuits Syst. Signal Process..

[8]  Hassan Elwan,et al.  Low-voltage low-power CMOS current conveyors , 1997 .

[9]  Firat Kaçar,et al.  New lossless inductance simulators realization using a minimum active and passive components , 2010, Microelectron. J..

[10]  Alessandro Trifiletti,et al.  The VCG-CCII: a novel building block and its application to capacitance multiplication , 2009 .

[11]  Shahram Minaei,et al.  Electronically Tunable Simulated Transformer and Its Application to Stagger-Tuned Filter , 2008, IEEE Transactions on Instrumentation and Measurement.

[12]  Erkan Yuce,et al.  A novel floating simulation topology composed of only grounded passive components , 2010 .

[13]  Alain Fabre,et al.  On the frequency limitations of the circuits based on second generation current conveyors , 1995 .

[14]  Shahram Minaei,et al.  Universal current-mode filters and parasitic impedance effects on the filter performances , 2008 .

[15]  Alessandro Trifiletti,et al.  A novel low-voltage low-power fully differential voltage and current gained CCII for floating impedance simulations , 2009, Microelectron. J..

[16]  Shen-Iuan Liu,et al.  Voltage-mode universal filters using two current conveyors , 1997 .

[17]  Fırat Kaçar,et al.  Voltage mode universal filters employing single FDCCII , 2010 .

[18]  K. Smith,et al.  A second-generation current conveyor and its applications , 1970, IEEE Transactions on Circuit Theory.

[19]  Giuseppe Ferri,et al.  CCII-based floating inductance simulator with compensated series resistance , 2003 .

[20]  A. Fabre,et al.  New second generation current conveyor with reduced parasitic resistance and bandpass filter application , 2001 .

[21]  Raj Senani,et al.  New grounded simulated inductance circuit using a single PFTFN , 2009 .

[22]  Oguzhan Cicekoglu New current conveyor based active-gyrator implementation , 1998 .