A Parallel and Distributed Topological Approach to 3D IC Optimal Layout Design

[1]  Renato Fernandes Hentschke,et al.  Algorithms for wire length improvement of VLSI circuits with concern to critical paths , 2007 .

[2]  Kia Bazargan,et al.  Placement and routing in 3D integrated circuits , 2005, IEEE Design & Test of Computers.

[3]  Thomas Lengauer,et al.  Combinatorial algorithms for integrated circuit layout , 1990, Applicable theory in computer science.

[4]  Wei Liu,et al.  Net Balanced Floorplanning Based on Elastic Energy Model , 2008, 2008 NORCHIP.

[5]  Stefan Hougardy,et al.  An exact algorithm for wirelength optimal placements in VLSI design , 2016, Integr..

[6]  Malgorzata Chrzanowska-Jeske,et al.  Fast Placement-Aware 3-D Floorplanning Using Vertical Constraints on Sequence Pairs , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[7]  Yici Cai,et al.  Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  Stefan Boettcher Extremal Optimization: Heuristics Via Co-Evolutionary Avalanches , 2000, Comput. Sci. Eng..

[9]  Yuan Xie,et al.  System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs) , 2009, 2009 Asia and South Pacific Design Automation Conference.

[10]  Giovanni De Micheli,et al.  Design Methods and Tools for 3D Integration , 2011, VLSIT 2011.

[11]  Nadine Gottschalk,et al.  Vlsi Physical Design From Graph Partitioning To Timing Closure , 2016 .

[12]  Maciej Ogorzalek,et al.  Using shape grammars and extremal optimization in 3D IC layout design , 2015 .

[13]  Anantha Chandrakasan,et al.  Three-dimensional integrated circuits: performance, design methodology, and CAD tools , 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

[14]  Maciej Ogorzalek,et al.  3D ICs Layout Hypergraph Representation , 2014 .

[15]  Maciej Ogorzalek,et al.  Extremal optimization approach to 3D design of integrated circuits layouts , 2015, 2015 Seventh International Conference on Advanced Computational Intelligence (ICACI).

[16]  Maciej Ogorzalek,et al.  Hypergraphs and extremal optimization in 3D integrated circuit design automation , 2017, Adv. Eng. Informatics.