Real-time adjustment of power management policy for a time-based power control architecture

As state-of-the-art mobile devices are demanded for high performance and attractive designs, system-on-chips have been integrated with many functional blocks into a single chip to reduce the chip size, cost, and power consumption. In this paper, to reduce power consumption of heterogeneous processor, a power management algorithm is proposed with a time-based power control architecture which autonomously performs voltage/clock scaling operations without the intervention of the processors. The proposed algorithm has adaptively adjusted time-threshold levels for voltage/clock control to minimize the power consumption and work in severe time-constraints for real-time processing. The real-time adjustment makes robust performance of the power consumption guarantee regardless of patterns of data traffic and diverse application programs. To show performance of the proposed, they are adopted to an application processor integrated with a communication processor for smartphones. Via electronic system-level simulation, it is shown that the proposed algorithm reduces the power consumption by approximately 40%.

[1]  Hoi-Jun Yoo,et al.  A 52.4mW 3D Graphics Processor with 141Mvertices/s Vertex Shader and 3 Power Domains of Dynamic Voltage and Frequency Scaling , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[2]  Thomas D. Burd,et al.  Design issues for Dynamic Voltage Scaling , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[3]  David Blaauw,et al.  Theoretical and practical limits of dynamic voltage scaling , 2004, Proceedings. 41st Design Automation Conference, 2004..

[4]  Trevor Pering,et al.  Energy Efficient Voltage Scheduling for Real-Time Operating Systems , 1998 .

[5]  Li Shang,et al.  Dynamic voltage scaling with links for power optimization of interconnection networks , 2003, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings..

[6]  Xin Wang,et al.  Optimal Subcarrier-Chunk Scheduling for Wireless OFDMA Systems , 2011, IEEE Transactions on Wireless Communications.

[7]  Vincent K. N. Lau,et al.  Automatic Performance Setting for Dynamic Voltage Scaling , 2002, Wirel. Networks.

[8]  Karthik Dantu,et al.  Frame-based dynamic voltage and frequency scaling for a MPEG decoder , 2002, ICCAD 2002.

[9]  Shie Mannor,et al.  Adaptive Timeout Policies for Fast Fine-Grained Power Management , 2007, AAAI.

[10]  Chaehag Yi,et al.  Low complexity, real-time adjusted power management policy using Golden Section Search , 2013, 2013 International SoC Design Conference (ISOCC).

[11]  Trevor Mudge,et al.  Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads , 2002, ICCAD 2002.

[12]  Jun-Ho Huh,et al.  System Identification Using Embedded Dynamic Signal Analyzer , 2011 .

[13]  T. Fujiyoshi,et al.  A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling , 2006, IEEE Journal of Solid-State Circuits.

[14]  Chen Tianzhou,et al.  Balance the battery life and real-time issues for portable real-time embedded system by applying DVS with battery model , 2008, 2008 34th Annual Conference of IEEE Industrial Electronics.

[15]  Kang G. Shin,et al.  Real-time dynamic voltage scaling for low-power embedded operating systems , 2001, SOSP.

[16]  Chaehag Yi,et al.  High-performance low-power application processor integrated with modem processor , 2013, 2013 International SoC Design Conference (ISOCC).

[17]  Sang-Woo Kim,et al.  Time-based power control architecture for application processors in smartphones , 2012 .

[18]  Luca Fanucci,et al.  Architectural-Level Power Optimization of Microcontroller Cores in Embedded Systems , 2007, IEEE Trans. Ind. Electron..

[19]  Thomas D. Burd,et al.  Energy efficient CMOS microprocessor design , 1995, Proceedings of the Twenty-Eighth Annual Hawaii International Conference on System Sciences.

[20]  F. Hatori,et al.  An H.264/MPEG-4 audio/visual CODEC LSI with module-wise dynamic voltage/frequency scaling , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[21]  Suzanne Lesecq,et al.  Advanced coupled voltage-frequency control for power efficient DVFS management , 2012, IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society.