SystemC-link: Parallel SystemC simulation using time-decoupled segments

Virtual platforms have become essential tools in the design process of modern embedded systems. Their accessibility and early availability make them ideal tools for design space exploration and debugging of target specific software. However, due to increasing platform complexity and the need to simulate more and more processors simultaneously, performance of virtual platforms degrades rapidly. This work presents SystemC-Link, a segment based parallel simulation framework for SystemC simulators. It achieves high simulation performance by using a parallel and time-decoupled simulation approach. Furthermore, it offers a virtual sequential environment for each simulation segment. This enables use of legacy models by allowing operation on global state without risking race conditions during parallel simulation. The approach is evaluated in a variety of scenarios, including a contemporary multi-core platform based on the OpenRISC architecture running Linux. For this benchmark, a 3.2× higher simulation performance was achieved with SystemC-Link compared to standard SystemC on a regular workstation PC.

[1]  Rainer Leupers,et al.  legaSCi: Legacy SystemC Model Integration into Parallel Systemc Simulators , 2013, 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum.

[2]  James Tandon.  The OpenRISC processor: open hardware and Linux , 2011 .

[3]  Soojung Ryu,et al.  SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

[4]  Martin Radetzki,et al.  Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[5]  Matthieu Moy.  Parallel programming with SystemC for loosely timed models: A non-intrusive approach , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[6]  Barton P. Miller,et al.  What are race conditions?: Some issues and formalizations , 1992, LOPL.

[7]  Franco Fummi,et al.  SAGA: SystemC acceleration on GPU architectures , 2012, DAC Design Automation Conference 2012.

[8]  Sandeep K. Shukla,et al.  SCGPSim: A fast SystemC simulator on GPUs , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

[9]  James C. Hoe,et al.  Highly-parallel special-purpose multicore architecture for SystemC/TLM simulations , 2014, 2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV).

[10]  Andreas Gerstlauer,et al.  The next generation of virtual prototyping: Ultra-fast yet accurate simulation of HW/SW systems , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[11]  Christoph Roth,et al.  A Framework for exploration of parallel SystemC simulation on the single-chip cloud computer , 2012, SimuTools.

[12]  Rainer Leupers,et al.  Time-decoupled parallel SystemC simulation , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[13]  Xu Han,et al.  Parallel discrete event simulation of Transaction Level Models , 2012, 17th Asia and South Pacific Design Automation Conference.

[14]  Xu Han,et al.  May-happen-in-parallel analysis based on segment graphs for safe ESL models , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).