Low power balanced balun LNA employing double noise-canceling techniques

This paper presents a wideband low power balun LNA with double noise canceling techniques and symmetric outputs. First, the CS amplifier in parallel with the CG stage cancels the noise and distortion of the CG amplifier. Second, an auxiliary amplifier (Aux) is employed in the CS stage to reduces the noise of the CS stage and avoids traditional up scaling of the CS stage. Moreover, the employed Aux stage reduces the output impedance and allows CG and CS stages to drive equal loads. The modified CS stage overcomes the disadvantages of high power consumption and weak output balance in conventional balun LNAs and improves IIP2. Besides, a feedback loop is utilized around the CG amplifier to match the input in a wide frequency band utilizing a low power CG stage. Lower transconductance in the CS stage beside the current reused technique in the CG stage significantly reduces power consumption. The post-layout simulation of the proposed LNA in 180 nm RF CMOS process shows a maximum voltage gain of 20.2 dB with − 3 dB bandwidth of 0.4–2.8 GHz. The minimum NF is 2.65 dB with input matching better than − 12 dB in BW. The third input intercept point (IIP3) is − 0.008 dBm. The consuming power is 4.5 mW from 1.5 V DC supply and the chip area is only 0.038 mm2.