Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation

In the context of SOI, thermal constraint is more serious for analog devices. Besides the hot-spot effect, the temperature gradient on symmetrical devices may cause errors and even failures in the function. In order to handle these problems, this paper introduces an accurate thermal model into the placement process. Based on the geometric symmetry which is achieved with corner block list (CBL) for the first time, the thermal model helps to find the thermal-optimal placement. And the experimental results show this method is promising.

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