Phase-plane-derived distortion modeling of a fast and accurate digitizing sampler

Continued efforts to model the distortion behavior of custom-designed digitizing samplers for accurate measurement of dynamic signals are reported. This work is part of ongoing efforts at the National Institute of Standards and Technology (NIST) to advance the state of the art in waveform sampling metrology. In this paper, an analytic error model for a sampler having a -3-dB 6-GHz bandwidth is described. The model is derived from examination of the sampler's error behavior in the phase plane. The model takes as inputs the per-sample estimates of signal amplitude, first derivative, and second derivative, where the derivatives are with respect to time. The model's analytic form consists of polynomials in these terms, which are chosen from consideration of the voltage dependence of the digitizer input capacitance and the previously studied error behavior in a predecessor digitizer. At 1 GHz, an improvement in total harmonic distortion from -32 to -46 dB is obtained when model-generated sample corrections are applied to the waveform. The effect of timebase distortion in the sampling system is also accounted for and corrected. The inclusion of second-derivative dependence in the model is shown to improve the model's fit to the measured data by providing fine temporal adjustment of the fitted waveform

[1]  T. M. Souders,et al.  Phase plane compensation of the NIST sampling comparator system , 1994, Conference Proceedings. 10th Anniversary. IMTC/94. Advanced Technologies in I & M. 1994 IEEE Instrumentation and Measurement Technolgy Conference (Cat. No.94CH3424-9).

[2]  D. M. Hummels,et al.  Analog-to-digital converter error diagnosis , 1996, Quality Measurement: The Indispensable Bridge between Theory and Reality (No Measurements? No Science! Joint Conference - 1996: IEEE Instrumentation and Measurement Technology Conference and IMEKO Tec.

[3]  D. Moulin,et al.  On A/D converter linearization using two-dimensional error-correction tables , 1991 .

[4]  T. M. Souders,et al.  A custom integrated circuit comparator for high-performance sampling applications , 1992, [1992] Conference Record IEEE Instrumentation and Measurement Technology Conference.

[5]  Kate A. Remley,et al.  Phase detrending for measured multisine signals , 2003, 61st ARFTG Conference Digest, Spring 2003..

[6]  B. N. Babu,et al.  Phase-plane analysis of high speed A/D converters with sine waves , 1991 .

[7]  Hyunchul Ku,et al.  Analysis of ACPR performance for memoryless predistorter considering power amplifier memory effects , 2004, 2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535).

[8]  Gerard N. Stenbakken,et al.  Time-base nonlinearity determination using iterated sine-fit analysis , 1998, IEEE Trans. Instrum. Meas..

[9]  D.I. Bergman Dynamic error correction of a digitizer for time-domain metrology , 2004, IEEE Transactions on Instrumentation and Measurement.

[10]  Ioannis Papantonopoulos,et al.  Characterization of ADCs using a non-iterative procedure , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[11]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[12]  D. Moulin,et al.  Real-time equalization of A/D converter nonlinearities , 1989, IEEE International Symposium on Circuits and Systems,.

[13]  David I. Bergman,et al.  A low-noise latching comparator probe for waveform sampling applications , 2003, IEEE Trans. Instrum. Meas..

[14]  D. M. Hummels,et al.  Fast compensation of analog to digital converters , 1999, IMTC/99. Proceedings of the 16th IEEE Instrumentation and Measurement Technology Conference (Cat. No.99CH36309).