Performance analysis of LTE protocol processing on an ARM based mobile platform

In this paper we present detailed profiling results and identify the time critical algorithms of the Long Term Evolution (LTE) layer 2 (L2) protocol processing on an ARM based mobile hardware platform. Furthermore, we investigate the applicability of a single ARM processor combined with a traditional hardware acceleration concept for the significantly increased computational demands in LTE and future mobile devices. A virtual prototyping approach is adopted in order to simulate a state-of-the-art mobile phone platform which is based on an ARM1176 core. Moreover a physical layer and base station emulator is implemented that allows for protocol investigations on transport block level at different transmission conditions. By simulating LTE data rates of 100 Mbit/s and beyond, we measure the execution times in a protocol stack model which is compliant to 3GPP Rel.8 specifications and comprises the most processing intensive downlink (DL) part of the LTE L2 data plane. We show that the computing power of a single embedded processor at reasonable clock frequencies is not enough to cope with the L2 requirements of next generation mobile devices. Thereby, Robust Header Compression (ROHC) processing is identified as the major time critical software algorithm, demanding half of the entire L2 DL execution time. Finally, we illustrate that a conventional hardware acceleration approach for the encryption algorithms fails to offer the performance required by LTE and future mobile phones.

[1]  T. Eckart,et al.  Development and Verification of Embedded Firmware using Virtual System Prototypes , 2006, 2006 International Symposium on System-on-Chip.

[2]  S. Heinen,et al.  DATE 2007 "Best Industrial Designs" Session: From Algorithm to First 3.5G Call in Record Time - A Novel System Design Approach Based on Virtual Prototyping and its Consequences for Interdisciplinary System Design Teams , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[3]  Olli Silvén,et al.  Observations on Power-Efficiency Trends in Mobile Communication Devices , 2007, EURASIP J. Embed. Syst..

[4]  V. Rhymend Uthariaraj,et al.  Performance analysis of embedded media applications in newer ARM architectures , 2005, 2005 International Conference on Parallel Processing Workshops (ICPPW'05).

[5]  N. P. Andersen,et al.  The Third Generation Partnership Project (3GPP) , 2002 .

[6]  Frank Vahid,et al.  Dynamic hardware/software partitioning: a first approach , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[7]  Johan Cockx,et al.  Efficient modeling of preemption in a virtual prototype , 2000, Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668).

[8]  Sebastian Hessel,et al.  Acceleration of the L4/Fiasco microkernel using scratchpad memory , 2008, MobiVirt '08.

[9]  C. Carbonelli,et al.  On 3G LTE Terminal Implementation - Standard, Algorithms, Complexities and Challenges , 2008, 2008 International Wireless Communications and Mobile Computing Conference.

[10]  Sebastian Hessel,et al.  On the Design of a Suitable Hardware Platform for Protocol Stack Processing in LTE Terminals , 2009, 2009 International Conference on Computational Science and Engineering.