论文信息 - Technology And Drift Characteristics Of UVCVD-SiO2/InP MISFET Devices

Technology And Drift Characteristics Of UVCVD-SiO2/InP MISFET Devices

Ion implanted planar MISFET's on semi-insulating indium phosphide substrate were studied. In-situ treatment with ammonia and UV activated CVD of silicon dioxide provided for threshold voltage drift below 0.5 V on depletion-mode transistors. Inverters from enhancement/depletion transistor pairs and 19-stage ring oscillators were made.

[1] J. Abeles,et al. High-speed enhancement mode InP MISFETs grown by Chloride vapor phase epitaxy , 1989, 1987 International Electron Devices Meeting.

[2] S. Loualiche,et al. Schottky and field‐effect transistor fabrication on InP and GaInAs , 1988 .

[3] D. Gutierrez,et al. Gigahertz logic gates based on InP-MISFET's with minimal drain current drift , 1986, IEEE Electron Device Letters.

[4] J. B. Boos,et al. Planar, fully ion-implanted InP junction FETs with a nitride-registered gate metallization , 1989, IEEE Electron Device Letters.