A design automation system for CMOS analog integrated circuits using New Hybrid Shuffled Frog Leaping Algorithm

This paper presents a new computer-aided design (CAD) system for automated sizing of analog integrated circuits (ICs). A new evolutionary algorithm, called New Hybrid Shuffled Frog Leaping (NHSFL) Algorithm, is proposed to deal with the equality and inequality constraints in the problem and to deduce the device sizes optimizing the performance of the circuits. For this, a new frog leaping rule is proposed to improve the local exploration and performance of the standard SFLA. Also, to improve the convergence velocity of the algorithm, the mutation operator is used for generating new frog, instead of random mechanism. By linking MATLAB and HSPICE the system evaluates the circuit performance during electrical simulation, in the optimization loop in the MATLAB environment, to be selected as an appropriate circuit topology. To assess the system, complex and hard-to-design analog blocks with restricted design requirements are presented in 0.18@mm CMOS process technology. The simulation results obtained from the proposed system verify that the design requirements are closely satisfied, even in tough conditions. Furthermore, some comparisons are made with available methods like Genetic algorithm (GA) and Imperialist Competitive algorithm (ICA) showing that the presented algorithm offers excellent qualifications in terms of time, efficiency and robustness.

[1]  Javad Askari,et al.  OPTIMAL DESIGN OF DAMPING CONTROLLERS FOR MULTI-MACHINE POWER SYSTEMS USING METAHEURISTIC TECHNIQUES , 2011 .

[2]  Antonio Torralba,et al.  FASY: a fuzzy-logic based tool for analog synthesis , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Ali Jafari,et al.  Design optimization of analog integrated circuits by using artificial neural networks , 2010, 2010 International Conference of Soft Computing and Pattern Recognition.

[4]  Mohamed I. Elmasry,et al.  STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  J.C. Lai,et al.  ADOPT-a CAD tool for analog circuit design , 1988, IEEE Circuits and Devices Magazine.

[6]  Muzaffar Eusuff,et al.  Shuffled frog-leaping algorithm: a memetic meta-heuristic for discrete optimization , 2006 .

[7]  Biranchinath Sahu,et al.  Automatic synthesis of CMOS operational amplifiers: a fuzzy optimization approach , 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

[8]  Ka Nang Leung,et al.  Analysis of multistage amplifier-frequency compensation , 2001 .

[9]  Rob A. Rutenbar,et al.  OASYS: a framework for analog circuit synthesis , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Mohammed Ismail,et al.  Introduction to Analog VLSI Design Automation , 2011 .

[11]  Zheng Wang,et al.  Analog circuit optimization system based on hybrid evolutionary algorithms , 2009, Integr..

[12]  Bozena Kaminska,et al.  FPAD: a fuzzy nonlinear programming approach to analog circuit design , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[13]  Alberto L. Sangiovanni-Vincentelli,et al.  DELIGHT.SPICE: an optimization-based system for the design of integrated circuits , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[14]  Rob A. Rutenbar,et al.  Synthesis of high-performance analog circuits in ASTRX/OBLX , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  D. J. Allstot,et al.  A multistage amplifier technique with embedded frequency compensation , 1999, IEEE J. Solid State Circuits.

[16]  Ali Jafari,et al.  Design of Analog Integrated Circuits by Using Genetic Algorithm , 2010, 2010 Second International Conference on Computer Engineering and Applications.

[17]  P.R. Gray,et al.  OPASYN: a compiler for CMOS operational amplifiers , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Nobuo Fujii,et al.  Automated Design of Analog Circuits Accelerated by Use of Simplified MOS Model and Reuse of Genetic Operations , 2007, IEICE Trans. Electron..

[19]  Rob A. Rutenbar,et al.  How to automate analog IC designs , 1988, IEEE Spectrum.

[20]  Gaetano Palumbo,et al.  Analytical comparison of frequency compensation techniques in three‐stage amplifiers , 2008, Int. J. Circuit Theory Appl..

[21]  Robert G. Meyer,et al.  Analysis and Design of Integrated Circuits , 1967 .

[22]  Yanfeng Wang,et al.  An improved shuffled frog leaping algorithm with cognitive behavior , 2008, 2008 7th World Congress on Intelligent Control and Automation.

[23]  Eric A. Vittoz,et al.  IDAC: an interactive design tool for analog CMOS circuits , 1987 .

[24]  Behzad Razavi,et al.  Design of Analog CMOS Integrated Circuits , 1999 .

[25]  Hidetoshi Onodera,et al.  Operational-amplifier compilation with performance optimization , 1990 .

[26]  Zhou Gu,et al.  A Novel Memetic Algorithm for Global Optimization Based on PSO and SFLA , 2007, ISICA.

[27]  Esteban Tlelo-Cuautle,et al.  Automatic Synthesis of VFs and VMs by Applying Genetic Algorithms , 2008 .

[28]  Thai-Hoang Huynh,et al.  A modified shuffled frog leaping algorithm for optimal tuning of multivariable PID controllers , 2008, 2008 IEEE International Conference on Industrial Technology.

[29]  O. Shoaei,et al.  Design optimization of analog integrated circuits using simulation-based genetic algorithm , 2003, Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on.

[30]  Alberto L. Sangiovanni-Vincentelli,et al.  ECSTASY: a new environment for IC design optimization , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[31]  Emad Elbeltagi.  Evolutionary Algorithms for Large Scale Optimization In Construction Management , 2007 .

[32]  Ali Jalali,et al.  New Method to Compensate Three-Stage Amplifiers Based on Pole and Zero Cancellation Technique , 2011, 2011 International Conference on Communication Systems and Network Technologies.

[33]  Kevin E Lansey,et al.  Optimization of Water Distribution Network Design Using the Shuffled Frog Leaping Algorithm , 2003 .

[34]  Biranchinath Sahu,et al.  A fuzzy logic based approach for parametric optimization of MOS operational amplifiers , 2002 .

[35]  Rob A. Rutenbar,et al.  Computer-aided design of analog and mixed-signal integrated circuits , 2000, Proceedings of the IEEE.

[36]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[37]  A. Vaze.  Analog Circuit Design using Genetic Algorithm: Modified , 2008 .

[38]  Ka Nang Leung,et al.  Three-stage large capacitive load amplifier with damping-factor-control frequency compensation , 2000, IEEE Journal of Solid-State Circuits.

[39]  Michiel Steyaert,et al.  Analog Circuit Design , 2005, Springer US.

[40]  Fathey M. El-Turky,et al.  BLADES: an artificial intelligence approach to analog circuit design , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[41]  Phillip E Allen,et al.  CMOS Analog Circuit Design , 1987 .