Lower Bounds for Constant Multiplication Problems

Lower bounds for problems related to realizing multiplication by constants with shifts, adders, and subtracters are presented. These lower bounds are straightforwardly calculated and have applications in proving the optimality of solutions obtained by heuristics.

[1]  In-Cheol Park,et al.  FIR filter synthesis algorithms for minimizing the delay and the number of adders , 2001 .

[2]  A. Dempster,et al.  Use of minimum-adder multiplier blocks in FIR digital filters , 1995 .

[3]  Andrew G. Dempster,et al.  Power analysis of multiplier blocks , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[4]  Andrew G. Dempster,et al.  Designing multiplier blocks with low logic depth , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[5]  Oscar Gustafsson,et al.  A Difference Based Adder Graph Heuristic for Multiple Constant Multiplication Problems , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[6]  Andrew G. Dempster,et al.  Efficient interpolators and filter banks using multiplier blocks , 2000, IEEE Trans. Signal Process..

[7]  L. Wanhammar,et al.  Design of high-speed multiplierless filters using a nonrecursive signed common subexpression algorithm , 2002 .

[8]  O. Gustafsson,et al.  Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach , 2004, Proceedings of the 6th Nordic Signal Processing Symposium, 2004. NORSIG 2004..

[9]  Markus Püschel,et al.  Multiplierless multiple constant multiplication , 2007, TALG.

[10]  Paulo F. Flores,et al.  An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

[11]  David Bull,et al.  Primitive operator digital filters , 1991 .

[12]  O. Gustafsson,et al.  On the use of multiple constant multiplication in polyphase FIR filters and filter banks , 2004, Proceedings of the 6th Nordic Signal Processing Symposium, 2004. NORSIG 2004..

[13]  K. Steiglitz,et al.  Some complexity issues in digital signal processing , 1984 .

[14]  Nicolas Boullis,et al.  Some optimizations of hardware multiplication by constant matrices , 2003, Proceedings 2003 16th IEEE Symposium on Computer Arithmetic.

[15]  Graham A. Jullien,et al.  Theory and Applications of the Double-Base Number System , 1999, IEEE Trans. Computers.

[16]  A. Dempster,et al.  Multiplication by an integer using minimum adders , 1994 .

[17]  Patrick Schaumont,et al.  A new algorithm for elimination of common subexpressions , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  O. Gustafsson,et al.  Efficient Implementation of FIR Filter Based Rational Sampling Rate Converters Using Constant Matrix Multiplication , 2006, 2006 Fortieth Asilomar Conference on Signals, Systems and Computers.

[19]  Lars Wanhammar,et al.  ILP modelling of the common subexpression sharing problem , 2002, 9th International Conference on Electronics, Circuits and Systems.

[20]  Oscar Gustafsson Contributions to low-complexity digital filters , 2003 .

[21]  Andrew G. Dempster,et al.  Towards an Algorithm for Matrix Multiplier Blocks , 2003 .

[22]  Miodrag Potkonjak,et al.  Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[23]  O. Gustafsson,et al.  Simplified Design of Constant Coefficient Multipliers , 2006 .

[24]  A. P. Vinod,et al.  FIR filter implementation by efficient sharing of horizontal and vertical common subexpressions , 2003 .

[25]  R. Hartley Subexpression sharing in filters using canonic signed digit multipliers , 1996 .

[26]  Kaushik Roy,et al.  A graph theoretic approach for synthesizing very low-complexityhigh-speed digital filters , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[27]  Chiang-Ju Chien,et al.  A novel common-subexpression-elimination method for synthesizing fixed-point FIR filters , 2004, IEEE Trans. Circuits Syst. I Regul. Pap..

[28]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[29]  A. Dempster,et al.  Constant integer multiplication using minimum adders , 1994 .

[30]  Andrew G. Dempster,et al.  Multiplierless FIR filter design algorithms , 2005, IEEE Signal Processing Letters.

[31]  A. Dempster,et al.  Common subexpression elimination algorithm for low-cost multiplierless implementation of matrix multipliers , 2004 .