Photon: A new mix columns architecture on FPGA

Lightweight cryptography is an important element in smart devices that require data security as one of the features. These smart devices utilize cryptography when transferring sensitive data. Most of the smart devices are resource constrained devices and thus possess limited computing capability and low memory space. The PHOTON hash function algorithm is a promising lightweight cryptography approach for resource-constrained devices. It has a complex operation called MixColumns. This paper presents a new MixColumns architecture for PHOTON implemented on Field Programmable Gate Array (FPGA) device. In our design, the number of complex multiplication operations is reduced by utilizing comparators that are based on four-bit Galois operations. The efficient PHOTON hardware design was coded using a very high speed integrated circuit hardware description language, VHDL. The design was successfully synthesized, mapped, simulated and tested on two FPGA evaluation boards namely, Sparten3 and Artix-7. The results show that the proposed design achieve a throughput of 582 Mbps and an efficiency of 1.55 Gbps/slice for Spartan3, while a throughput of 1.41 Gbps and efficiency of 8.66 Gbps/slice are obtained for Artix-7. The performance on both platforms has superseded performance of existing implementations in literature.