A Configurable Approximation Min-Sum Decoding Algorithm for Low Density Parity Check Codes

A configurable approximation Min-sum decoding algorithm for LDPC is proposed in this paper. The degradation factor of BP to MS is found and optimized based on Jacobian Logarithm and hardware working mode. The decoding algorithm is configurable to satisfy different environment's need and will only need update the variable memory. The simulation is based on LDPC NR 3GPP 38.212 release and the comparison results showed the proposed configurable approximation Min-sum decoding algorithm have a better BER performance. The hardware of this proposed algorithm is based on Min-sum decoder and the extra cost is only a shifter and an adder besides the configurable memory.

[1]  Ulf Schlichtmann,et al.  PieceTimer: A holistic timing analysis framework considering setup/hold time interdependency using a piecewise model , 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[2]  Yiyu Shi,et al.  Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Yiyu Shi,et al.  EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration Under Process Variations , 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Nejwa El Maammar,et al.  Layered Offset Min-Sum Decoding for Low Density Parity Check Codes , 2018, 2018 International Symposium on Advanced Electrical and Communication Technologies (ISAECT).

[5]  Yue Cao,et al.  An improved LDPC decoding algorithm based on min-sum algorithm , 2011, 2011 11th International Symposium on Communications & Information Technologies (ISCIT).

[6]  Xian-Da Zhang,et al.  Reduced-complexity belief propagation decoding for low-density parity-check codes , 2008 .

[7]  Shaoping Chen,et al.  Residual-Decaying-Based Informed Dynamic Scheduling for Belief-Propagation Decoding of LDPC Codes , 2019, IEEE Access.

[8]  V. V. Vityazev,et al.  Self-corrected UMP-APP decoding of LDPC codes , 2016, 2016 5th Mediterranean Conference on Embedded Computing (MECO).

[9]  Fakhreddine Ghaffari,et al.  Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders , 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[10]  David Declercq,et al.  Analysis of Min-Sum based decoders implemented on noisy hardware , 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

[11]  Mohammad-Reza Sadeghi,et al.  FFT Based Sum-Product Algorithm for Decoding LDPC Lattices , 2012, IEEE Communications Letters.

[12]  Vincent C. Gaudet,et al.  A degree-matched check node approximation for LDPC decoding , 2005, Proceedings. International Symposium on Information Theory, 2005. ISIT 2005..

[13]  Robert G. Gallager,et al.  Low-density parity-check codes , 1962, IRE Trans. Inf. Theory.