Run-time Fallback and Multiboot Technique for Embedded Platform using Low-Cost Spartan-6 FPGA

This paper aims at demonstrating the whole process allowing implementing a robust in-system update solution for Microblaze-based embedded systems using low-cost and low-power consuming Spartan-6 FPGA. In this work, we design a run-time full reconfigurable embedded platform based on the Spartan-6 Multiboot and fallback features. The FPGA Multiboot feature enables switching between two or more configuration files, on the fly (during normal operation), from an external SPI Flash memory. When an error or an interruption is detected during the Multiboot configuration process, the FPGA triggers fallback feature that ensures the configuration with a golden “safe” image. Embedded development kit (EDK) prepared by Xilinx company is employed to implement the embedded platform on a Spartan-6 evaluation board (i.e., SP605). Based on the Internal Configuration Access Port (ICAP) primitive in the FPGA fabric, we used Xilinx LogiCORE IP AXI HWICAP (Advanced eXtensible Interface Hardware ICAP) core to write software programs that modify the circuit structure and functionality during runtime. This IP Core has been originally designed to support the Run-time Partial Reconfiguration (PR) feature for the Virtex-4, Virtex-5, Virtex-6 family FPGA. Xilinx added support for Spartan-6 family FPGA in 2010 and we decide to use it to facilitate the run-time full reconfiguration process. Key-Words: Run-time full reconfiguration, Multiboot, Fallback, ICAP, Microblaze, AXI HWICAP, FPGA