Optimal cost/performance design of ATM switches

This paper proposes a methodology for performing an evaluation and optimization of the cost of an ATM switching architecture under performance constraints given in terms of virtual connection blocking probability. An analysis of blocking networks is developed, and combined with known results concerning nonblocking networks, provides a theoretical model which relates traffic characteristics, network topology and blocking probability in a multirate/multiservice broadband environment. An analysis of the characteristics determining the cost of a generic ATM switch implementation follows. The model is oriented to optimize both the topological parameters and the speed advantage, with respect to the main cost factors of VLSI-based switching networks i.e., components count and complexity, interconnection costs. >

[1]  U. Ziegler,et al.  A versatile ATM switch concept , 1990, International Symposium on Switching.

[2]  A. Forcina,et al.  Archrtectural issues in the Interoperability between mans and the atm network , 1990, International Symposium on Switching.

[3]  V. Benes,et al.  Mathematical Theory of Connecting Networks and Telephone Traffic. , 1966 .

[4]  Michel Servel,et al.  The 'Prelude' ATD experiment: assessments and future prospects , 1988, IEEE J. Sel. Areas Commun..

[5]  Jonathan S. Turner,et al.  Design of a broadcast packet switching network , 1988, IEEE Trans. Commun..

[6]  Jonathan S. Turner,et al.  Design of an integrated services packet network , 1985, SIGCOMM '85.

[7]  J. Turner,et al.  New directions in communications (or which way to the information age?) , 1986, IEEE Communications Magazine.

[8]  A. L. Fox,et al.  RACE BLNT: a technology solution for the broadband local network , 1990 .

[9]  I. Svinnset.  Nonblocking ATM switching networks , 1994, IEEE Trans. Commun..

[10]  Thomas G. Robertazzi.  Nonblocking Networks for Fast Packet Switching , 1993 .

[11]  Nicholas Pippenger,et al.  On Crossbar Switching Networks , 1975, IEEE Trans. Commun..

[12]  Y. Sakurai,et al.  Large-scale ATM multistage switching network with shared buffer memory switches , 1991, IEEE Communications Magazine.

[13]  Charles Clos,et al.  A study of non-blocking switching networks , 1953 .

[14]  J. Kaufman,et al.  Blocking in a Shared Resource Environment , 1981, IEEE Trans. Commun..

[15]  D. Boettle,et al.  Switching network architecture for atm based broadband communications , 1990, International Symposium on Switching.

[16]  Takahiko Kozaki,et al.  32*32 shared buffer type ATM switch VLSIs for B-ISDN , 1991, ICC 91 International Conference on Communications Conference Record.

[17]  R. Melen,et al.  Experimentation on asynchronous switching techniques for broadband ISDN , 1988 .

[18]  T. Suzuki,et al.  Output‐buffer switch architecture for asynchronous transfer mode , 1989 .

[19]  L. Delbrouck.  On the Steady-State Distribution in a Service Facility Carrying Mixtures of Traffic with Different Peakedness Factors and Capacity Requirements , 1983, IEEE Trans. Commun..

[20]  Jason Hickey,et al.  The implementation of a high speed ATM packet switch using cmos vlsi , 1990, International Symposium on Switching.

[21]  Takahiko Kozaki,et al.  32 x 32 Shared Buffer Type ATM Switch VLSI's for B-ISDN's , 1991, IEEE J. Sel. Areas Commun..

[22]  W. David Sincoskie,et al.  Sunshine: A High-Performance Self-Routing Broadband Packet Switch Architecture , 1991, IEEE J. Sel. Areas Commun..

[23]  J.-F.P. Labourdette,et al.  Link access blocking in very large multi-media networks , 1990, SIGCOMM 1990.

[24]  Marco Listanti,et al.  Switching structures for ATM , 1989, Comput. Commun..

[25]  Anthony S. Acampora,et al.  The Knockout Switch: A Simple, Modular Architecture for High-Performance Packet Switching , 1987, IEEE J. Sel. Areas Commun..

[26]  Riccardo Melen,et al.  Optimal cost/performance design of ATM switches , 1992, [Proceedings] IEEE INFOCOM '92: The Conference on Computer Communications.

[27]  Yoshito Sakurai,et al.  Large scale atm multi-stage switching network with shared buffer memory switches , 1990, International Symposium on Switching.

[28]  Jonathan S. Turner,et al.  Nonblocking Multirate Networks , 1989, SIAM J. Comput..

[29]  W. D. Sincoskie,et al.  Sunshine: a high performance self-routing broadband packet switch architecture , 1990, International Symposium on Switching.

[30]  Jonathan S. Turner,et al.  Nonblocking multirate distribution networks , 1990, Proceedings. IEEE INFOCOM '90: Ninth Annual Joint Conference of the IEEE Computer and Communications Societies@m_The Multiple Facets of Integration.

[31]  M. Decina,et al.  On bandwidth allocation to bursty virtual connections in ATM networks , 1990, IEEE International Conference on Communications, Including Supercomm Technical Sessions.

[32]  H. Suzuki,et al.  Output-buffer switch architecture for asynchronous transfer mode , 1989, IEEE International Conference on Communications, World Prosperity Through Communications,.

[33]  Jonathan S. Turner.  Design of an integrated services packet network , 1985, SIGCOMM '85.

[34]  G. Gallassi,et al.  An experimental atm switching architemre for the evolving b-isdn scenario , 1990, International Symposium on Switching.

[35]  C. Y. Lee.  Analysis of switching networks , 1955 .

[36]  Einir Valdimarsson.  Blocking in multirate networks , 1991, IEEE INFCOM '91. The conference on Computer Communications. Tenth Annual Joint Comference of the IEEE Computer and Communications Societies Proceedings.

[37]  Koso Murakami,et al.  A development of a high speed ATM switching LSIC , 1990, IEEE International Conference on Communications, Including Supercomm Technical Sessions.