Packaging and Smart Power Systems

Publisher Summary This chapter provides background information, framework, and procedures to produce guide and system partitioning and functional integration. Circuits are typically designed based upon a pre-determined set of packaging technologies ranging from silicon integration of sub-circuit functions to multiple boards in a rack. Partitioning a circuit for packaging in one technology, such as all silicon, is straightforward. A first step to partitioning is creation of a comprehensive categorized list of electrical, mechanical, and thermal, technical user requirements. The second step is creation of a simple component characterization map that identifies dominant attributes of the components. A high-frequency magnetic core couples the radiated field into a copper conductor on a printed wiring board (PWB) and causes eddy current heating, increasing the skin-effect resistance. Higher resistance loss further increases conductor heating which increases the mechanical stresses between the conductor and PWB leading to early failure. Limitation of the dielectric isolation process is the higher cost. However, dielectric isolation does provide for more reliable isolation with greater circuit flexibility.