A scaled 0.25- mu m bipolar technology using full e-beam lithography

The full leverage offered by electron-beam lithography has been exploited in a scaled 0.25- mu m double polysilicon bipolar technology. Devices and circuits were fabricated using e-beam lithography for all mask levels with level-to-level overlays tighter than 0.06 mu m. Ion implantation was used to form a sub-100-nm intrinsic base profile, and a novel in-situ doped polysilicon emitter process was used to minimize narrow emitter effects. Transistors with 0.25- mu m emitter width have current gains above 80 and cutoff frequencies as high as 40 GHz. A record ECL gate delay of 20.8 ps at 4.82 mW has been measured together with a minimum power-delay product of 47 fJ (42.1 ps at 1.12 mW). These results demonstrate the feasibility and resultant performance leverage of aggressive scaling of conventional bipolar technologies.<<ETX>>

[1]  H. Goto,et al.  Analysis of highly doped collector transistors by using two-dimensional process/device simulation and its application of ECL circuits , 1991 .

[2]  J.D. Cressler,et al.  Novel in-situ doped polysilicon emitter process with buried diffusion source (BDS) , 1991, IEEE Electron Device Letters.

[3]  D.D. Tang,et al.  50-GHz self-aligned silicon bipolar transistors with ion-implanted base profiles , 1990, IEEE Electron Device Letters.

[4]  J.D. Cressler,et al.  A submicrometer high-performance bipolar technology , 1989, IEEE Electron Device Letters.

[5]  D. Tang,et al.  Bipolar circuit scaling , 1979, 1979 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[6]  S. Konaka,et al.  HSST BiCMOS technology with 26 ps ECL and 45 ps 2 V CMOS inverter , 1990, International Technical Digest on Electron Devices.

[7]  Keith A. Jenkins,et al.  Sub-15 ps gate delay with new AC-coupled active pull-down ECL circuit , 1991, Proceedings of the 1991 Bipolar Circuits and Technology Meeting.

[8]  F. J. Hohn,et al.  Lithographic performance of an El-3 system at 0.25 mm groundrules , 1991 .

[9]  Tokuo Kure,et al.  A 64 GHz Si bipolar transistor using in-situ phosphorus doped polysilicon emitter technology , 1991, International Electron Devices Meeting 1991 [Technical Digest].