A Fully-Integrated 0.11μm CMOS Digital Low-IF DVB-S2 Satellite TV Dual Tuner SOC

A digital low-IF fully-integrated dual tuner for DVB-S2 satellite TV applications was realized in 0.11μm CMOS. It provides baseband digital I/Q outputs for a demodulator-on-host back-end processor. A wide bandwidth ring oscillator based frequency synthesizer having a large frequency step was used to down-convert a cluster of channels to a sliding low-IF frequency, while the second down-conversion to baseband was performed in the digital domain. The low-IF architecture allows a discrete AGC loop, while avoiding 1/f noise and DC offset issues. Eliminating the VCO tank inductors minimizes frequency pulling and parasitic coupling to front-end LNA, allowing the integration of a large digital core on the same die with the sensitive RF front-end.

[1]  Bo-Eun Kim,et al.  A 9dBm IIP3 direct-conversion satellite broadband tuner-demodulator SOC , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[2]  B. Fransis,et al.  A fully integrated broadband direct-conversion receiver for DBS applications , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[3]  H. Samueli,et al.  A single-chip universal digital satellite receiver with 480 MHz IF input , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

[4]  T. Tewksbury,et al.  A 480 MHz variable rate QPSK demodulator for direct broadcast satellite , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[5]  A. Maxim,et al.  A fully-integrated 0.13/spl mu/m CMOS low-IF DBS satellite tuner using a ring oscillator based frequency synthesizer , 2006, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.

[6]  Weinan Gao,et al.  A Fully Integrated Dual Broadband Direct- Conversion Tuner Chip for Digital Satellite TV Applications , 2005 .