Semiconductor memory device having vertical channel transistor and method for fabricating the same device

It formed vertically to the portion of the two opposite sides of the two-channel transistor, one of the active region is formed of a vertical gate electrode on the isolation film in contact with the active region of the channel. The upper surface of the active region in the semiconductor substrate exposed in the central yen common bit line contact plug and the bit line contact plug is formed on both sides there are two storage node contact plug and the bit line contact plug side is formed in the insulating spacer. A word line and a bit line and a capacitor is formed is laminated in sequence on a semiconductor substrate as in the conventional general semiconductor memory device. Thus, with all the effective layout of the memory cell can be achieved by the 4F2 structure can be applied to a conventional line and a contact forming step can be easily formed of a highly integrated semiconductor memory device.