Chapter 7 – Memory System

Publisher Summary This chapter discusses various aspects of memory architecture of the Cortex-M0 processor. The 4GB memory space of the Cortex-M0 processor is architecturally divided into a number of regions. Each region has its recommended usage, and the memory access behavior could depend on which memory region one is accessing to. The size of the code region is 512 MB and it is primarily used to store program code, including the exception vector table, which is a part of the program image. It is found that when the Cortex-M0 processor comes out of reset, it accesses the vector table in address zero for initial MSP value and reset vector value, and it then starts the program execution from the reset vector. It is suggested that to ensure that the system works correctly, a valid vector table and a valid program memory must be available in the system to prevent the processor from executing rogue program code.